Asymmetric Level Shifter Layout for Low Duty Cycle Distortion
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Solution Overview
Problem
Voltage level shifters in systems with multiple voltage domains face challenges in reducing duty cycle distortion, particularly across a wide range of operating conditions, leading to potential malfunctions in flip-flops and other devices due to imbalances in rise and fall times.
Innovation Solution
The implementation of a voltage level shifter with asymmetric transistor sizes in its branches, where the first pull-down transistor has a wider channel width than the second pull-down transistor, and cross-coupling with a third branch, helps in achieving balanced rise and fall times, reducing duty cycle distortion over a wide range of conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional voltage level shifter with symmetrical transistor branches is used, then the circuit structure is simple, but duty cycle distortion occurs due to imbalanced rise and fall times across wide operating conditions
Solution Approach 1:
The patent applies asymmetry by configuring the first pull-down transistor with a wider channel width than the second pull-down transistor in the differential pair. This intentional asymmetry compensates for process variations and voltage domain differences, balancing the rise and fall times of the output signal across wide operating conditions, thereby reducing duty cycle distortion without requiring complex external compensation circuits
2Reliability
If transistor channel widths are adjusted to balance rise and fall times, then duty cycle distortion is reduced, but manufacturing precision requirements increase
Solution Approach 1:
The patent applies local quality by differentiating the channel widths of specific transistors (first pull-down transistor wider than second pull-down transistor) based on their functional roles in the differential pair. This localized adjustment optimizes the timing characteristics of each branch independently, achieving overall signal balance while maintaining manufacturability through targeted rather than universal precision requirements
3Adaptability or versatility
If a three-branch cross-coupled structure is implemented, then duty cycle distortion is minimized across voltage domains, but device complexity increases
Solution Approach 1:
The patent applies universality by designing the three-branch cross-coupled structure where the differential pair branches and the third branch work together to handle multiple functions: level shifting between voltage domains, duty cycle correction, and signal buffering. The cross-coupling configuration allows the same structure to adapt to different voltage domain scenarios while maintaining consistent performance
Data Source
AI summary
According to certain aspects, a level shifter includes a first branch including a first pull-up transistor configured to pull up a first node, and a first pull-down transistor configured to pull down the first node. The level shifter also includes a second branch including a second pull-up transistor configured to pull up a second node, and a second pull-down transistor configured to pull down the second node. The level shifter further includes a third branch including a third pull-up transistor configured to pull up a third node, and a third pull-down transistor configured to pull down the third node. The first branch is cross coupled with the third branch, the second branch is cross coupled with the third branch, the first pull-down transistor has a first channel width, the second pull-down transistor has a second channel width, and the first channel width is greater than the second channel width.