Asymmetric Memory Access via Multi-Port Segmentation

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current memory systems face inefficiencies due to the delay in processing multiple access commands with the same address, leading to reduced performance and throughput.

Innovation Solution

The implementation of asymmetric memory access by distributing access commands across multiple ports, allowing each port to process access commands independently and reducing the likelihood of command collisions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple access commands with the same address are processed sequentially through a single port, then command collision is avoided, but processing latency increases and throughput decreases

Engineering Contradiction:
Improvecommand collision avoidanceVSAvoidprocessing latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The memory device is divided into multiple independent ports, each capable of processing access commands separately. This segmentation allows parallel processing of multiple commands that would otherwise collide in a single-port system, thereby reducing latency while maintaining reliable command processing through dedicated port assignments.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system transitions from a single-dimensional sequential processing model to a multi-dimensional parallel processing model by introducing multiple ports. Commands are distributed across different port dimensions, enabling simultaneous processing without collision while maintaining system reliability through structured port management.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Device complexity

If multiple access commands are processed through a single port, then device complexity is reduced, but processing throughput decreases

Engineering Contradiction:
Improveport structure simplicityVSAvoidprocessing throughput
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The memory device is segmented into multiple independent ports, each functioning as a separate processing channel. This increases throughput by enabling parallel command processing while managing complexity through modular port design, where each port maintains a simplified individual structure that can be independently optimized.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Multiple ports are designed with universal functionality to process the same types of access commands, allowing the system to handle diverse workloads efficiently. This multi-functionality approach maintains ease of use while dramatically improving throughput through parallel processing capabilities.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If access commands are processed sequentially, then port resource contention is avoided, but system efficiency decreases

Engineering Contradiction:
Improveport resource managementVSAvoidmemory access efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system segments the port resources into multiple independent processing units, eliminating resource contention by providing dedicated ports for different command streams. This segmentation maintains reliable resource management through structured allocation while dramatically improving efficiency through concurrent processing.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Multiple ports enable continuous processing of access commands without idle waiting periods. While one port processes a command, another port can simultaneously handle a different command, ensuring continuous useful action across the system and eliminating the inefficiencies of sequential processing.

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS20250181246A1Asymetric memory access
Publication Date: 2025.06.05 MICRON TECHNOLOGY INC
  • US20250181246A1 patent drawing
  • US20250181246A1 patent drawing
  • US20250181246A1 patent drawing

AI summary

An asymmetric search can be performed by providing a first access command, for a first address of a target memory device, to a first bin of the target memory device, where the target memory device includes a plurality of ports and the first access command is provided to the first bin utilizing a first port. A second access command, for a second address of the target memory device, can be provided to a second bin of the target memory device. The second address can have a first offset from the first address. The second access command can be provided to the second bin utilizing a second port from the plurality of ports. The first access command and the second access command can be provided by an initiator device to the first bin and the second bin via a fabric that connect the initiator device to the target memory device.