Asymmetric Memory Channel Bandwidth Allocation

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Solution Overview

Problem

Existing modular memory systems face limitations in peak memory bandwidth due to noise from stub paths and increased costs with replicated memory channels, making it difficult to efficiently expand storage capacity while maintaining signaling rates.

Innovation Solution

The implementation of an expandable memory system with asymmetric memory channels, where memory channels of progressively reduced widths are dedicated to respective sockets, allowing for point-to-point signaling and re-allocation of signaling bandwidth as memory modules are added, thereby maintaining a fixed net signaling bandwidth.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If separate, replicated memory channels are coupled point-to-point between the controller and respective memory-module sockets, then signaling rates and peak memory bandwidth are improved, but the number of controller interface pins and external signal lines increases, driving up cost

Engineering Contradiction:
Improvesignaling ratesVSAvoidnumber of controller interface pins
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

A single memory channel is designed to serve multiple memory module sockets through dynamic configuration. The channel can be allocated to different sockets based on system needs, allowing one physical channel to perform the function of multiple channels. This multi-functional approach maintains high signaling rates while reducing the total number of controller interface pins required.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The memory channel allocation is made dynamic rather than static. The system can reconfigure which socket receives the memory channel at different times, allowing flexible adaptation to various memory expansion scenarios. This dynamic allocation enables the same physical infrastructure to support different configurations without requiring additional pins for each potential socket.

Inventive Principle:
Principle #15Dynamics

2Productivity

If separate, replicated memory channels are coupled point-to-point between the controller and respective memory-module sockets, then peak memory bandwidth is improved, but cost increases

Engineering Contradiction:
Improvepeak memory bandwidthVSAvoidcost
Core Design Contradiction:
ProductivityVSEase of manufacture

Solution Approach 1:

One memory channel is designed to serve multiple sockets through dynamic allocation, replacing the need for multiple dedicated channels. This universal channel can be configured to work with any installed memory module, providing high bandwidth performance while significantly reducing the cost of controller interface pins and external signal lines.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Device complexity

If modular memory systems use shared memory channel with stub paths, then device complexity is reduced, but noise and signal reflections increase, limiting signaling rates

Engineering Contradiction:
Improvememory channel structureVSAvoidsignaling rates
Core Design Contradiction:
Device complexityVSSpeed

Solution Approach 1:

The problematic stub path segments are removed from the signal path. Instead of having signals traverse through unused sockets (creating stub paths), the system establishes direct point-to-point connections between the controller and installed memory modules. This extraction of harmful stub paths eliminates signal reflections and noise while maintaining a relatively simple overall system structure.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The memory channel structure is adapted locally based on which sockets are populated. When a socket contains a memory module, the channel is configured to provide a direct connection. When a socket is empty, the channel is allocated to a different populated socket. This local adaptation ensures optimal signal quality for each configuration without requiring a completely different overall architecture.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS20250156348A1Asymmetric-channel memory system
Publication Date: 2025.05.15 RAMBUS INC
  • US20250156348A1 patent drawing
  • US20250156348A1 patent drawing
  • US20250156348A1 patent drawing

AI summary

An expandable memory system that enables a fixed signaling bandwidth to be configurably re-allocated among dedicated memory channels. Memory channels having progressively reduced widths are dedicated to respective memory sockets, thus enabling point-to-point signaling with respect to each memory socket without signal-compromising traversal of unloaded sockets or costly replication of a full-width memory channel for each socket.