Asymmetric Multi-Core Processor Frequency Scaling Control
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Solution Overview
Problem
Asymmetric multiprocessing in multicore chipsets leads to performance issues, including slower processing and increased power consumption due to asynchronous frequency scaling and inappropriate load threshold settings, resulting in worse performance compared to single-core processors.
Innovation Solution
Adjusting the load threshold for frequency ramp-up in multicore processors to 60-70% of the maximum frequency and introducing intermediate frequencies instead of maximum turbo frequencies, with a synchronization frequency applied when the load exceeds a certain threshold and a ramp-up frequency applied when the load reaches a lower threshold, to optimize performance and reduce power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If asynchronous frequency scaling is implemented in asymmetric multiprocessing, then each core can independently scale frequency, but thread migration causes performance degradation and visual stutters
Solution Approach 1:
The patent merges the frequency control of multiple cores by introducing a synchronization frequency that is applied across all online processing units. This ensures that when threads are migrated between cores, the frequency remains consistent, preventing performance degradation and visual stutters while maintaining the adaptability of independent scaling.
Solution Approach 2:
The patent implements dynamic frequency adjustment by introducing two ramp-up thresholds (first and second thresholds) that trigger frequency changes based on current load conditions. The frequency dynamically transitions from a base frequency to an intermediate frequency and finally to a maximum frequency as load increases, optimizing both adaptability and productivity.
2Productivity
If load threshold of 90% is used for frequency ramp-up in single core, then maximum turbo frequency is achieved, but in multi-core the distributed load requires different thresholds to maximize efficiency
Solution Approach 1:
The patent changes the load threshold parameters from the conventional 90% single-core threshold to a two-threshold system adapted for multi-core environments. The first threshold and second threshold are specifically tuned for distributed load scenarios, enabling efficient frequency scaling that maximizes processing speed while minimizing unnecessary power consumption at lower load levels.
Solution Approach 2:
The patent implements dynamic frequency adjustment by introducing two ramp-up thresholds (first and second thresholds) that trigger frequency changes based on current load conditions. The frequency dynamically transitions from a base frequency to an intermediate frequency and finally to a maximum frequency as load increases, optimizing both adaptability and productivity.
3Productivity
If maximum turbo frequency is applied to all cores, then processing speed is maximized, but power consumption increases significantly
Solution Approach 1:
The patent implements dynamic frequency adjustment by introducing two ramp-up thresholds (first and second thresholds) that trigger frequency changes based on current load conditions. The frequency dynamically transitions from a base frequency to an intermediate frequency and finally to a maximum frequency as load increases, optimizing both adaptability and productivity.
Solution Approach 2:
The patent applies different frequency levels to different cores based on their individual load conditions. Instead of uniformly applying maximum turbo frequency to all cores, each core operates at the appropriate frequency level (base, intermediate, or maximum) according to its specific workload, reducing overall power consumption while maintaining processing throughput.
Data Source
AI summary
An ASMP computing device is provided, which comprises one or more computing components, which themselves comprise a plurality of processing units and one or more memory devices that are communicatively coupled to the one or more computing components, Stored on the memory devices are first and second processing frequency data. The first processing frequency data comprise a synchronization frequency, which comprises a frequency for application to all online processing units when a measured highest load of any online processing unit is greater than a first ramp-up processor load threshold and an operating frequency of the online processing unit is lower than the synchronization frequency. The second processing frequency data comprises a ramp-up frequency, the ramp-up frequency comprising a frequency for application to any online processing unit when a measured processing load of any online processing unit is greater than a second ramp-up processing load threshold.


