Asymmetric Bonding Pads for Multi-Substrate Semiconductor Stacks
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Solution Overview
Problem
The challenge in manufacturing semiconductor devices by bonding three or more substrates via interlayer dielectrics lies in effectively forming bonding pads that maintain electrical connectivity while preventing high resistance and disconnection due to misalignment and warpage issues during the bonding process.
Innovation Solution
The semiconductor device design incorporates metal pads with different shapes and sizes on each substrate, specifically setting small areas for pads on one substrate and larger areas on another to improve integration and prevent disconnection, with the use of varying insulating materials at bonding interfaces to control copper diffusion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If metal pads with the same shape and size are used on all substrates, then the manufacturing process is simple, but misalignment and warpage cause high resistance and disconnection
Solution Approach 1:
The patent applies asymmetry by designing metal pads with different shapes on different substrates. Specifically, the first metal pad on the first substrate has a first shape, while the second metal pad on the second substrate has a second shape that is different from the first shape. This asymmetric design compensates for misalignment and warpage issues during bonding, ensuring reliable electrical connectivity despite manufacturing variations.
Solution Approach 2:
The patent applies local quality by optimizing the shape of metal pads at specific bonding locations. Each metal pad is designed with a shape tailored to its specific position and bonding requirements. The first metal pad and second metal pad have different local geometries to accommodate local variations in alignment and warpage, thereby improving electrical connectivity at each bonding interface.
2Reliability
If larger metal pad areas are used, then connection reliability improves, but integration density decreases
Solution Approach 1:
The patent uses asymmetry to optimize pad areas differently on each substrate. The first metal pad has a first area and the second metal pad has a second area, where the shapes are deliberately made different. This allows each pad to have the minimum necessary area for reliable bonding while maintaining overall integration density, as the larger area is only used where specifically needed for connection reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the integration density of metal pads, reduces the risk of high resistance and disconnection, and effectively prevents copper atom diffusion across bonding interfaces, ensuring reliable electrical connectivity and improved semiconductor device performance.
Implementation Method 1
effectively prevents copper atom diffusion across bonding interfaces
Data Source
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AI summary
In one embodiment, a semiconductor device includes a first substrate (11), a first insulator (13) provided on the first substrate, a first pad (17) provided in the first insulator, a second insulator (21) provided on the first insulator, and a second pad (22) provided in the second insulator, disposed on the first pad, and being in contact with the first pad. The device further includes a third pad (29) provided in the second insulator, and disposed above the second pad, a third insulator (31) provided on the second insulator, and a fourth pad (32) provided in the third insulator, disposed on the third pad, and being in contact with the third pad. Furthermore, a shape of the third (29) or fourth pad (32) is different from a shape of the first (17) or second pad (22). Also disclosed is a method of manufacturing said semiconductor device.