Asymmetric Power Grid Layout for Standard Cell Placement
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In semiconductor device design, the placement of standard cells within power grid layouts is hindered by conflicts between strap patterns and pin patterns, leading to reduced unconflicted locations and increased design complexity due to symmetric arrangements of conductive layers.
Innovation Solution
An asymmetric arrangement of strap patterns in the conductive layer M(i+1) of the power grid layout diagram is implemented, which reduces conflicts with pin patterns, thereby increasing the number of unconflicted locations and simplifying the placement of standard cells by using a method that considers stub resistance and pitch sizing to maintain below-threshold resistance levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If symmetric arrangements of conductive layers are used in power grid layouts, then manufacturing consistency and alignment are improved, but conflicts between strap patterns and pin patterns increase, reducing unconflicted locations for standard cell placement
Solution Approach 1:
The patent applies asymmetry by intentionally designing the power grid layout with non-uniform spacing between conductive layers. Specifically, the distance between adjacent conductive layers is varied - some regions have smaller spacing while others have larger spacing - thereby creating asymmetric patterns that reduce conflicts with standard cell pin patterns while maintaining manufacturing feasibility through controlled variation rather than complete irregularity
2Stability of the object's composition
If symmetric arrangements of conductive layers are used in power grid layouts, then structural regularity is improved, but the number of unconflicted locations for standard cell placement decreases
Solution Approach 1:
The patent introduces asymmetric spacing patterns in the power grid conductive layers, where the distance between adjacent layers varies across different regions. This asymmetric design creates more unconflicted locations by avoiding regular overlapping patterns with standard cell pin patterns, thereby increasing placement flexibility while maintaining sufficient structural regularity through controlled design rules
Solution Approach 2:
The patent applies local quality by allowing different spacing characteristics in different regions of the power grid. Specifically, certain areas have tighter spacing while others have more relaxed spacing, enabling the power grid to adapt to local placement requirements and reduce conflicts in specific regions without compromising overall structural integrity
3Device complexity
If asymmetric arrangement of strap patterns is implemented, then conflicts with pin patterns are reduced and unconflicted locations increase, but design complexity increases due to stub resistance and pitch sizing considerations
Solution Approach 1:
The patent employs parameter changes by systematically varying the spacing parameters between conductive layers. Instead of using uniform spacing, the design modifies pitch and spacing parameters to create asymmetric patterns that reduce conflicts. The patent establishes design rules that constrain these parameter variations to maintain manufacturability while achieving the desired conflict reduction
Data Source
AI summary
A device includes a power grid (PG) arrangement including: first and second segments in a first conductive layer which are conductive and extend in a first direction, the first segments being configured for a first reference voltage and the second segments being configured for a second reference voltage; the first and second segments being interspersed relative to a second direction, the second direction being perpendicular to the first direction; and relative to the second direction, the first segments being symmetrically spaced apart relative to each other, the second segments being symmetrically spaced apart relative to each other, and the second segments being substantially asymmetrically spaced between corresponding adjacent ones of the first segments.