Asymmetric Standard Cell Power Rails for Mixed-Height IC Rows
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Solution Overview
Problem
The existing integrated circuit (IC) structures face challenges in scaling due to symmetric power rail sizing, leading to design rule violations, congestion issues, and electromigration/voltage drop problems when trying to accommodate cells of different heights, as they require uniform power rail sizing across all libraries.
Innovation Solution
The implementation of an asymmetric power rail structure across cell boundaries, where adjacent cell rows share a power rail with different heights for each portion within and outside the cell boundary, allowing for seamless integration of cells with varying heights while optimizing area usage and performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If symmetric power rail structures are used across all cell rows, then design rule compliance is maintained, but area efficiency deteriorates and congestion issues arise in smaller cells
Solution Approach 1:
The patent applies local quality by allowing different power rail heights in different cell rows. Specifically, first cell rows have a first power rail height while second cell rows have a second power rail height different from the first. This enables each cell row to have power rail dimensions optimized for its specific cell size and power requirements, rather than using a uniform symmetric structure across all rows.
Solution Approach 2:
The patent implements asymmetry by breaking the traditional symmetric power rail structure where both adjacent cell rows share the same power rail height. Instead, the patent allows asymmetric power rail heights across cell boundaries, with the first portion of the shared power rail having a different height than the second portion, optimizing area usage while maintaining design rule compliance.
2Manufacturing precision
If power rails are sized for the largest cells, then design rule compliance is maintained, but area efficiency and power density deteriorate in smaller cells
Solution Approach 1:
The patent enables local optimization of power rail dimensions by allowing different power rail heights for different cell rows. This ensures that each cell row receives power rails sized appropriately for its specific power requirements and cell dimensions, rather than all cells receiving oversized power rails designed for the largest cell type.
3Area of stationary object
If power rails are sized for the smallest cells, then area efficiency is improved, but electromigration and voltage drop issues arise in larger cells
Solution Approach 1:
The patent allows different cell rows to have different power rail heights, enabling larger cells to receive taller power rails with greater cross-sectional area for improved current carrying capacity and electromigration resistance, while smaller cells receive appropriately sized shorter power rails.
4Area of stationary object
If asymmetric power rail structures are implemented, then area efficiency and power optimization are improved, but device complexity increases
Solution Approach 1:
The patent segments the IC structure into different cell rows with different power rail height requirements. By dividing the power rail system into distinct segments (first cell rows with first power rail height, second cell rows with second power rail height), the patent manages complexity through structured segmentation rather than requiring complex adaptive structures throughout.
Data Source
AI summary
An integrated circuit (IC) structure includes a plurality of cell rows with each cell row including a plurality of (standard) cells. A power rail for at least one pair of adjacent cell rows is asymmetric relative to a cell boundary between adjacent cells of the at least one pair of adjacent cell rows. Embodiments of the disclosure can also include the standard cell including a plurality of transistors at a device layer, and at least a portion of an isolation area at an edge of the device layer defining a cell boundary. The standard cell also includes the power rail including a first portion within the cell boundary and a second portion outside the cell boundary. The first portion and the second portion have different heights such that the power rail is asymmetric across the cell boundary. The asymmetric power rail provides seamless integration of cell libraries having different heights.