Asymmetric SDB Isolation for FINFET Leakage Control

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current Single-diffusion Break (SDB) isolation structures in fin-type field effect transistors (FINFETs) are unable to effectively isolate transistors of opposite polarity, leading to shorting and leakage issues due to limitations in critical dimension and overlay, compromising device robustness and scalability.

Innovation Solution

A method is developed to form an SDB structure with an enlarged bottom in a self-aligned manner, creating trench isolation regions and SDB-type isolation regions that can isolate both same-polarity and opposite-polarity FINFETs by forming asymmetric trenches and filling them with an insulator, thereby eliminating leakage paths between n-well and p-well regions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a conventional SDB isolation structure is used, then same-polarity transistors can be isolated, but opposite-polarity transistors cannot be isolated due to CD and overlay limitations

Engineering Contradiction:
Improveisolation capabilityVSAvoiddevice robustness
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent applies asymmetry by forming an enlarged bottom cavity in the SDB isolation structure that is wider than the trench opening. This asymmetric geometry creates overlapping regions between adjacent trenches that effectively isolate opposite-polarity transistors, overcoming the limitations of conventional symmetric SDB structures that could only isolate same-polarity devices.

Inventive Principle:
Principle #4Asymmetry

2Productivity

If FINFET size is reduced to increase density, then device scalability improves, but robustness deteriorates due to difficulty in forming reliable isolation

Engineering Contradiction:
Improvedevice densityVSAvoiddevice robustness
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent transitions from a two-dimensional trench isolation to a three-dimensional structure by adding an enlarged bottom cavity. This vertical dimension expansion creates overlapping isolation regions that provide robust isolation even as horizontal dimensions are scaled down to increase device density.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Area of stationary object

If SDB structure is used for isolation, then total area is reduced, but leakage paths exist between n-well and p-well in opposite-polarity transistors

Engineering Contradiction:
Improvetotal device areaVSAvoidleakage current
Core Design Contradiction:
Area of stationary objectVSObject-generated harmful factors

Solution Approach 1:

The asymmetric enlarged bottom cavity creates lateral overlap between adjacent SDB structures, forming a continuous isolation barrier that blocks leakage paths between n-well and p-well regions while maintaining compact area footprint.

Inventive Principle:
Principle #4Asymmetry

Solution Approach 2:

The enlarged bottom cavity acts as an intermediary isolation region that physically separates and electrically isolates adjacent opposite-polarity transistors, preventing direct leakage paths through the substrate while maintaining area efficiency.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS10177151B1Single-diffusion break structure for fin-type field effect transistors
Publication Date: 2019.01.08 GLOBALFOUNDRIES US INC
  • US10177151B1 patent drawing
  • US10177151B1 patent drawing
  • US10177151B1 patent drawing

AI summary

A method and structure for a semiconductor device that includes one or more fin-type field effect transistors (FINFETs) and single-diffusion break (SDB) type isolation regions, which are within a semiconductor fin and define the active device region(s) for the FINFET(s). Asymmetric trenches are formed in a substrate through asymmetric cuts in sacrificial fins formed on the substrate. The asymmetric cuts have relatively larger gaps between fin portions that are closest to the substrate, and deeper portions of the asymmetric trenches are relatively wider than shallower portions. Channel regions are formed in the substrate below two adjacent fins. Source/drain regions of complementary transistors are formed in the substrate on opposite sides of the channel regions. The asymmetric trenches are filled with an insulator to form a single-diffusion break between two source/drain regions of different ones of the complementary transistors. Also disclosed is a semiconductor structure formed according to the method.