Asymmetric Selector Device for Balanced MTJ Memory Switching
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Solution Overview
Problem
Conventional memory cells with magnetic tunnel junction (MTJ) elements and selectors exhibit symmetric switching voltages, leading to inefficiencies in power consumption and potential unintended switching during read operations, as the voltages required to switch the MTJ from low to high resistance and from high to low resistance states are not balanced.
Innovation Solution
The introduction of a memory cell design featuring an MTJ memory element coupled with a selector having asymmetric conductance, where the selector's conductive state has lower resistance when switching from high to low resistance than from low to high resistance, allowing for balanced switching voltages and reduced power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If conventional symmetric selector devices are used in memory cells, then the device structure is simple, but the switching voltages are unbalanced leading to higher power consumption and potential unintended switching
Solution Approach 1:
The patent applies asymmetry by designing a selector device with different resistance values for forward and reverse bias conditions. Specifically, the selector has a first resistance value when switching from low to high resistance state and a second resistance value when switching from high to low resistance state, where these values are different. This asymmetric resistance characteristic enables balanced switching voltages and reduced power consumption while maintaining a relatively simple two-terminal device structure without requiring complex additional components
2Reliability
If symmetric switching voltages are used, then the device operation is straightforward, but unintended switching may occur during read operations
Solution Approach 1:
The asymmetric selector device enables reliable switching control by having different resistance characteristics for different switching directions. This allows the memory system to use different voltage thresholds for write operations versus read operations, preventing unintended switching during reads while maintaining straightforward operational protocols. The asymmetric conductance provides inherent protection against read disturbance
3Ease of manufacture
If the selector has equal resistance in both directions, then the device manufacturing is simpler, but the switching voltage balance is poor
Solution Approach 1:
The patent achieves switching voltage balance through asymmetric resistance design in the selector device. By incorporating different resistance values for forward and reverse bias conditions, the device naturally balances the switching voltages required for low-to-high and high-to-low resistance transitions. This approach maintains manufacturing feasibility while achieving precise voltage balance control
4Loss of energy
If conventional selectors are used, then the device complexity is low, but leakage currents are higher
Solution Approach 1:
The asymmetric selector device reduces leakage currents by having different resistance characteristics for different bias conditions. The device can be designed to present high resistance in the off-state for both forward and reverse bias, while maintaining the asymmetric property that enables balanced switching. This reduces static power consumption and leakage without requiring complex additional leakage blocking structures
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design balances the switching voltages of the memory cell, minimizing power consumption and preventing unintended switching during read operations by ensuring a higher voltage is required to switch from the low to high resistance state, thereby optimizing the power supply voltage and reducing leakage currents.
Implementation Method 1
The two-terminal selector in the conductive state has substantially lower resistance when switching the MTJ memory element from the low to high resistance state than from the high to low resistance state
Implementation Method 2
Spin transfer torque magnetic random access memory (STT-MRAM) is a new class of non-volatile memory
Implementation Method 3
electrons polarized by the magnetic reference layer can tunnel through the insulating tunnel junction layer, thereby decreasing the electrical resistance of the MTJ
Implementation Method 4
the magnetization direction of the magnetic free layer can be switched between two directions: parallel and anti-parallel with respect to the magnetization direction of the magnetic reference layer
Data Source
AI summary
The present invention is directed to a memory cell that includes a magnetic tunnel junction (MTJ) memory element, which has a low resistance state and a high resistance state, and a two-terminal selector coupled to the MTJ memory element in series. The MTJ memory element includes a magnetic free layer and a magnetic reference layer with an insulating tunnel junction layer interposed therebetween. The two-terminal selector has an insulative state and a conductive state. The two-terminal selector in the conductive state has substantially lower resistance when switching the MTJ memory element from the low to high resistance state than from the high to low resistance state. The voltages applied to the memory cell to respectively switch the MTJ memory element from the low to high resistance state and from the high to low resistance state may be substantially same.