Asymmetric Semiconductor Device Counterdoping for Leakage Reduction
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Solution Overview
Problem
Current semiconductor devices face challenges in achieving optimal threshold voltage tuning and reducing leakage between source and drain while maintaining current drive, particularly due to the limitations in forming precise conductivity type regions and channel structures.
Innovation Solution
The formation of semiconductor devices involves creating specific conductivity type regions and a channel region with non-linear surfaces, where the first and second type regions are doped with opposite conductivity types, and covered by third and fourth type regions, with the channel region extending between them, allowing for improved threshold voltage tuning and reduced leakage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional symmetric doping is used in semiconductor devices, then manufacturing simplicity is maintained, but threshold voltage tuning precision and leakage reduction are insufficient
Solution Approach 1:
The patent applies asymmetry by creating different conductivity type regions with opposite doping types on either side of the channel region. Specifically, a first conductivity type region (e.g., n-type) is formed in a first recess and a second conductivity type region (e.g., p-type) is formed in a second recess, creating an asymmetric counterdoping structure that enables precise threshold voltage tuning and reduces leakage currents.
Solution Approach 2:
The patent implements local quality by doping specific localized regions with opposite conductivity types rather than uniform doping. The first and second conductivity type regions are formed in specific recesses adjacent to the channel region, allowing localized control of electrical properties to tune threshold voltage and reduce leakage without affecting the entire device structure.
2Object-generated harmful factors
If counterdoped regions are formed to reduce leakage, then leakage between source and drain is reduced, but device structure complexity increases
Solution Approach 1:
The asymmetric counterdoping structure with first and second conductivity type regions of opposite doping types effectively reduces leakage currents by creating potential barriers at the interfaces. The asymmetry allows optimization of leakage reduction on each side of the channel region independently.
Solution Approach 2:
The device structure is segmented into distinct functional regions: the channel region and the separate first and second conductivity type regions formed in recesses. This segmentation allows each region to be optimized independently for its specific function while maintaining overall device performance.
3Manufacturing precision
If precise conductivity type regions are formed to improve threshold voltage tuning, then threshold voltage control is enhanced, but manufacturing process complexity increases
Solution Approach 1:
The patent employs preliminary action by forming recesses in the semiconductor substrate before doping the first and second conductivity type regions. This pre-preparation of the substrate structure facilitates more precise doping control and threshold voltage tuning while streamlining the overall manufacturing process.
Solution Approach 2:
Local quality is achieved through selective doping of specific regions with precise control over doping concentration and depth. The first and second conductivity type regions are doped with opposite types in a controlled manner to achieve precise threshold voltage tuning without requiring complex multi-step doping processes throughout the entire device.
Data Source
AI summary
A semiconductor device includes a first type region including a first conductivity type. The semiconductor device includes a second type region including a second conductivity type. The semiconductor device includes a third type region including a third conductivity type that is opposite the first conductivity type, the third type region covering the first type region. The semiconductor device includes a fourth type region including a fourth conductivity type that is opposite the second conductivity type, the fourth type region covering the second type region. The semiconductor device includes a channel region extending between the third type region and the fourth type region.


