Asymmetric Semiconductor Module Lead Arrangement

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Solution Overview

Problem

The cost-intensive process of packaging semiconductor devices due to the complexity of connecting multiple electrical connections while protecting them, often requiring multiple metal levels in circuit boards to avoid shorting.

Innovation Solution

A semiconductor module design where the first and second semiconductor devices have leads arranged in different sequences, allowing for a simpler circuit board configuration with leads inserted into mounting holes, enabling a common heatsink for efficient heat dissipation and reducing the need for multiple metal levels.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple metal levels are used in circuit boards to avoid shorting between leads, then electrical connectivity reliability is improved, but device complexity and manufacturing cost increase

Engineering Contradiction:
Improveelectrical connectivity reliabilityVSAvoidcircuit board complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies asymmetry by arranging leads of the first semiconductor device in a first sequence and leads of the second semiconductor device in a second sequence that is different from the first sequence. This asymmetric lead arrangement allows leads from opposite polarity devices to be spatially separated, preventing shorting without requiring multiple metal levels in the circuit board, thus reducing circuit board complexity while maintaining electrical connectivity reliability

Inventive Principle:
Principle #4Asymmetry

Solution Approach 2:

The patent inverts the conventional approach by having leads of opposite polarity devices (first and second semiconductor devices) extend from the same side of the module instead of having all leads extend from opposite sides. This inversion, combined with the different lead sequences, allows for simpler single-sided mounting and eliminates the need for complex multi-level circuit board connections

Inventive Principle:
Principle #13The other way round (Inversion)

2Reliability

If multiple metal levels are used in circuit boards to protect electrical connections, then protection of electrical connections is improved, but manufacturing cost increases

Engineering Contradiction:
Improveprotection of electrical connectionsVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The asymmetric lead arrangement where the first plurality of leads extends in a first sequence and the second plurality of leads extends in a second sequence different from the first sequence spatially separates leads of opposite polarity. This prevents shorting and protects electrical connections without requiring expensive multi-level circuit boards, thereby reducing manufacturing cost while maintaining connection protection

Inventive Principle:
Principle #4Asymmetry

Solution Approach 2:

The patent uses a simple, cost-effective circuit board configuration with basic mounting holes instead of expensive multi-level metalized structures. The asymmetric lead arrangement enables this simpler, cheaper board design to provide adequate protection and connectivity for the electrical connections

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

3Device complexity

If leads are arranged in different sequences for first and second semiconductor devices, then circuit board complexity is reduced, but manufacturing precision requirements increase

Engineering Contradiction:
Improvecircuit board layout complexityVSAvoidlead arrangement precision
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by pre-arranging the leads of the first semiconductor device in a first sequence and the leads of the second semiconductor device in a second sequence during the device assembly process. This pre-established asymmetric arrangement ensures that when the devices are mounted on the circuit board, the leads naturally align with appropriate mounting holes without requiring complex real-time adjustments, thus reducing circuit board layout complexity while maintaining manageable manufacturing precision requirements

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design simplifies the packaging process, reduces costs by eliminating the need for complex circuit board layouts, and allows for efficient heat management with a shared heatsink, while maintaining effective electrical connectivity.

Implementation Method 1

The heatsink side of the first semiconductor device faces the heatsink side of the second semiconductor device

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS8766430B2Semiconductor modules and methods of formation thereof
Publication Date: 2014.07.01 INFINEON TECHNOLOGIES AG
  • US8766430B2 patent drawing
  • US8766430B2 patent drawing
  • US8766430B2 patent drawing

AI summary

In accordance with an embodiment of the present invention, a semiconductor module includes a first semiconductor device having a first plurality of leads including a first gate/base lead, a first drain/collector lead, and a first source/emitter lead. The module further includes a second semiconductor device and a circuit board. The second semiconductor device has a second plurality of leads including a second gate/base lead, a second drain/collector lead, and a second source/emitter lead. The circuit board has a plurality of mounting holes, wherein each of the first plurality of leads and the second plurality of leads is mounted into a respective one of the plurality of mounting holes. At the plurality of mounting holes, a first distance from the first gate/base lead to the second gate/base lead is different from a second distance from the first source/emitter lead to the second source/emitter lead.