Asymmetric Source/Drain Contact Plug Layout in Semiconductor Structures
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Solution Overview
Problem
In semiconductor devices, poor contact between gate structures and source/drain layers can lead to increased contact resistance and inefficient electrical signal transfer, as existing technologies fail to ensure effective contact between these components.
Innovation Solution
The semiconductor device design includes a first source/drain layer with a concave upper surface and a second source/drain layer with a flat upper surface, where the contact plugs are strategically positioned to contact the edge portions of the first source/drain layer and the central portion of the second source/drain layer, respectively, ensuring optimal contact and reducing contact resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the contact plug is positioned at the center of the source/drain layer, then the manufacturing process is simplified, but the contact resistance increases due to poor contact between the gate structure and source/drain layer
Solution Approach 1:
The contact plug is intentionally positioned asymmetrically relative to the source/drain layer, specifically closer to the gate structure than the center. This asymmetric positioning ensures better contact between the contact plug and the gate structure, thereby reducing contact resistance and improving electrical connection reliability.
2Reliability
If the source/drain layer has a flat upper surface, then the manufacturing process is simpler, but the contact area between contact plug and source/drain layer is reduced
Solution Approach 1:
The upper surface of the source/drain layer is formed with a curved profile, specifically with the central portion being higher than the edge portion. This curvature increases the contact area between the contact plug and the source/drain layer, improving electrical connection reliability while the curvature is achieved through standard epitaxial growth processes.
Data Source
AI summary
A semiconductor device includes a first gate structure, a first source/drain layer and a first contact plug. The first gate structure is formed on a substrate, and extends in a second direction parallel to an upper surface of the substrate. The first source/drain layer is formed at a side of the first gate structure in a first direction substantially parallel to the upper surface of the substrate and crossing the second direction. A central portion in the first direction of an upper surface of the first source/drain layer is lower than an edge portion in the first direction of the upper surface of the first source/drain layer. The first contact plug is formed on the first source/drain layer, and contacts the edge portion of the upper surface of the first source/drain layer.