Asymmetric FinFET Source-Drain Profiles for Precise Etch Tuning
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The semiconductor industry faces challenges in accurately controlling the deposition and patterning processes during the fabrication of FinFET devices, particularly in advanced process nodes, which can lead to deteriorated electrical performance due to inaccurate source/drain structure formation.
Innovation Solution
The formation of asymmetric source/drain structures with different dimensions and profiles is achieved by using etchants with high selectivity to pattern and trim these structures at varying active regions, allowing for flexible adjustment of electrical performance through the use of n-type and p-type regions with distinct epi-material growth rates and etching processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If asymmetric source/drain structures are formed with different dimensions and profiles, then electrical performance is improved and electron mobility is enhanced, but manufacturing precision and process control become more difficult
Solution Approach 1:
The patent applies local quality by forming different source/drain structures in different active regions of the semiconductor device. Specifically, first source/drain structures are formed in first active regions while second source/drain structures are formed in second active regions, allowing each region to have optimized local properties tailored to specific electrical performance requirements.
Solution Approach 2:
The patent directly implements asymmetry by creating source/drain structures with different dimensions, profiles, and configurations. The first and second source/drain structures have deliberately different geometric properties to optimize electrical characteristics, such as electron mobility and contact resistance, in different regions of the device.
2Manufacturing precision
If etchants with high selectivity are used to pattern and trim source/drain structures, then manufacturing precision is improved, but device complexity increases
Solution Approach 1:
The patent utilizes parameter changes by employing etchants with high selectivity that have different etching rates and properties. The selective etching process modifies the geometric parameters of source/drain structures differently across various regions, achieving precise dimensional control and profile optimization through controlled chemical reactions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the electrical performance of semiconductor devices by optimizing the source/drain structures, improving electron mobility and reducing contact resistance, while allowing for precise tuning of device performance through asymmetric profiles and etching rates.
Implementation Method 1
an etching gas mixture including a sulfur containing passivation gas, wherein the etching gas mixture etches the first source/drain structure at a faster etching rate than etching the second source/drain structure
Implementation Method 2
a sulfur containing passivation gas, wherein the etching gas mixture etches the first source/drain structure at a faster etching rate than etching the second source/drain structure
Implementation Method 3
a sulfur containing passivation gas, wherein the etching gas mixture etches the first source/drain structure at a faster etching rate than etching the second source/drain structure
Data Source
AI summary
The present disclosure provides semiconductor devices with asymmetric source/drain structures. In one example, a semiconductor device includes a first group of source/drain structures on a first group of fin structures on a substrate, a second group of source/drain structures on a second group of fin structures on the substrate, and a first gate structure and a second gate structure over the first and the second group of fin structures, respectively, the first and second groups of source/drain structures being proximate the first and second gate structures, respectively, wherein the first group of source/drain structures on the first group of fin structures has a first source/drain structure having a first vertical height different from a second vertical height of a second source/drain structure of the second group of source/drain structures on the second group of fin structures.