Asymmetric Source/Drain Structure for Nanosheet Short-Channel Control

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Solution Overview

Problem

Current semiconductor devices face challenges in achieving high device performance and reliability due to limitations in scaling and current control capabilities, particularly in suppressing short channel effects in field-effect transistors like nanosheet transistors.

Innovation Solution

The semiconductor device incorporates a design with multiple channel structures and source/drain patterns featuring sloped and horizontal intersections, varying widths, and different interface distances to enhance channel control and reduce short channel effects, utilizing a combination of semiconductor liner and filling films and gate structures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional field-effect transistor structures are used, then manufacturing simplicity is maintained, but device performance and reliability deteriorate due to scaling limitations and short channel effects

Engineering Contradiction:
Improvedevice performance and reliabilityVSAvoidsource/drain pattern complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The source/drain pattern employs asymmetric side wall configurations where the first side wall includes sloped portions and the second side wall includes a vertical portion. This asymmetric design allows different regions of the source/drain structure to have optimized geometries for their specific functional requirements, improving device performance while managing manufacturing complexity through targeted geometric variation rather than complete structural redesign

Inventive Principle:
Principle #4Asymmetry

Solution Approach 2:

Different portions of the source/drain pattern are given different local geometries - the first side wall has sloped portions to optimize interface contact and stress distribution, while the second side wall has a vertical portion for compactness. This local quality approach allows each region to be optimized for its specific role, improving overall device reliability without requiring complete structural complexity throughout

Inventive Principle:
Principle #3Local quality

2Reliability

If gate-all-around transistor structures are implemented, then current control capability is improved, but manufacturing precision requirements increase due to complex 3D channel structures

Engineering Contradiction:
Improvecurrent control capabilityVSAvoidinterface width control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The first side wall of the source/drain pattern includes first and second sloped portions that create curved or angled interfaces with the channel structures. This curvature approach allows for gradual transitions and better stress distribution at interfaces, improving current control capability while the sloped geometry can be more easily formed through standard epitaxial growth processes compared to sharp vertical corners, thereby managing manufacturing precision requirements

Inventive Principle:
Principle #14Spheroidality (Curvature)

3Reliability

If symmetric source/drain patterns are used, then ease of manufacture is maintained, but device performance deteriorates due to inability to optimize different interface characteristics

Engineering Contradiction:
Improvedevice performanceVSAvoidsource/drain pattern fabrication
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The source/drain pattern deliberately uses asymmetric side wall configurations where the first side wall includes sloped portions and the second side wall includes a vertical portion. This asymmetric design allows different regions of the source/drain structure to have optimized geometries for their specific functional requirements, improving device performance while managing manufacturing complexity through targeted geometric variation rather than complete structural redesign

Inventive Principle:
Principle #4Asymmetry

Solution Approach 2:

Different portions of the source/drain pattern are given different local geometries - the first side wall has sloped portions to optimize interface contact and stress distribution, while the second side wall has a vertical portion for compactness. This local quality approach allows each region to be optimized for its specific role, improving overall device reliability without requiring complete structural complexity throughout

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS20240021675A1Semiconductor device
Publication Date: 2024.01.18 SAMSUNG ELECTRONICS CO LTD
  • US20240021675A1 patent drawing
  • US20240021675A1 patent drawing
  • US20240021675A1 patent drawing

AI summary

A semiconductor device includes: first and second channel structures spaced apart from each other in a first direction; and a source/drain pattern, between the first and second channel structures, including a first interface contacting the first channel structure and a second interface contacting the second channel structure, wherein, in a plan view, the source/drain pattern includes first and second side walls opposite to each other in a second direction, the first side wall includes a first sloped side wall, a second sloped side wall, and a first horizontal intersection at which the first and second sloped side walls meet, a width of the first interface is different from a width of the second interface, in the second direction, and a distance from the first interface to the first horizontal intersection is greater than a distance from the second interface to the first horizontal intersection, in the first direction.