Asymmetric SRAM Transistor Drain-Source Structure for Read-Write Margin
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Solution Overview
Problem
In advanced CMOS technology, SRAMs operating at sub-1V face challenges with read/write stability due to conflicting requirements for read/write operations, necessitating improved read and write margins to enhance anti-interference capabilities.
Innovation Solution
A semiconductor device with an asymmetric structure is designed, featuring a larger drain than source, which increases the current from the drain to the source, allowing for a low read current and high write current, thereby enhancing read and write margins. This is achieved through a manufacturing method that forms depressions of different sizes on either side of the gate structure, resulting in greater stress on the channel for the drain, facilitating higher current flow from the drain to the source.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the read current is made low to avoid interference during read operation, then the read margin is improved, but the write current becomes insufficient to complete write operation quickly
Solution Approach 1:
The patent applies asymmetry by making the drain region larger than the source region in the PG transistor. This asymmetric structure creates different current characteristics for read and write operations: the larger drain provides a low-resistance path for high write current from the bit line to the internal node, while the controlled source region maintains low read current to avoid interference. This structural asymmetry directly resolves the contradiction between read margin and write speed.
Solution Approach 2:
The patent implements local quality by creating a larger drain region specifically at the bit line interface where high current is needed for write operations, while keeping the source region size controlled for low read current. The different region sizes are localized to specific positions (drain at bit line side, source at internal node side) to optimize current characteristics for different operational modes, thereby improving both read margin and write speed simultaneously.
2Productivity
If the write current is made high to complete write operation quickly, then the write margin is improved, but the read current becomes too high causing interference to SRAM unit
Solution Approach 1:
The asymmetric drain-source structure enables the PG transistor to pass high write current in one direction (drain to source during write) while maintaining low read current in the opposite direction (source to drain during read). The larger drain region facilitates high current injection during write operations without causing excessive read current, thereby improving write speed while minimizing read interference.
Solution Approach 2:
By localizing the larger region size to the drain at the bit line interface, the patent enables high write current capability exactly where it is needed (at the bit line connection point) without affecting the source region that controls read current. This localized structural optimization allows high write current to flow into the internal node while keeping read current low, thus improving write speed without generating harmful read interference.
3Ease of manufacture
If symmetric source and drain structures are used, then the manufacturing process is simplified, but the current from drain to source cannot be greater than current from source to drain
Solution Approach 1:
The patent deliberately introduces asymmetry by forming the drain region with a larger area than the source region. This asymmetric structure is implemented through a modified manufacturing process that includes selective epitaxial growth or ion implantation to create different region sizes. The asymmetry is essential to achieve different current characteristics (higher drain-to-source current than source-to-drain current) which are necessary for improved read/write margins, while the manufacturing process remains relatively straightforward by adapting standard CMOS fabrication steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The asymmetric semiconductor structure ensures a low read current and high write current, thereby improving the read and write margins of SRAMs, enhancing their anti-interference capabilities.
Implementation Method 1
a size of the first drain is larger than a size of the first source... resulting in greater stress on the channel for the drain, facilitating higher current flow from the drain to the source
Data Source
AI summary
The present disclosure relates to the field of semiconductor technologies, and discloses semiconductor devices and manufacturing methods for the same. A semiconductor device may include: a substrate; a first active region on the substrate; a first gate structure positioned on the first active region; and a first source and a first drain that are positioned in the first active region and respectively on two sides of the first gate structure, where a size of the first drain is larger than a size of the first source. In forms of the present disclosure, because the size of the first drain is larger than the size of the first source, a current from the first drain to the first source is greater than a current from the first source to the first drain, so that the semiconductor device can make a read current relatively low and a write current relatively high in a static random access memory (SRAM), thereby improving a read margin and a write margin.