Asymmetric Terminal Opening for Semiconductor Memory Reliability

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Solution Overview

Problem

Semiconductor memory devices, such as USB flash drives, face challenges in ensuring reliable electrical connections due to deviations in terminal positions between the device and the host receptacle, leading to inconsistent contact and potential damage from excessive contact pressure or misalignment.

Innovation Solution

The semiconductor memory device design incorporates a substrate with a conductor layer and insulating layers, where the openings exposing the terminals have specific edge configurations to ensure reliable contact even with deviated terminal positions, reducing the risk of contact with the insulating layer and minimizing material costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the terminal opening is designed with symmetric edges equidistant from the terminal, then the manufacturing process is simplified, but the reliability of electrical connection deteriorates due to sensitivity to terminal position deviation

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidterminal position tolerance
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent applies asymmetry by designing the terminal opening with unequal distances from the terminal to its edges. Specifically, the distance from the terminal to the first edge is made smaller than the distance to the second edge. This asymmetric configuration creates a tolerance zone that accommodates terminal position deviations, ensuring that the terminal remains properly exposed while preventing contact with the insulating layer, thus improving connection reliability without requiring high manufacturing precision

Inventive Principle:
Principle #4Asymmetry

2Reliability

If the opening is made larger to accommodate terminal position deviation, then the reliability of electrical connection is improved, but the risk of contact with the insulating layer increases

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidcontact with insulating layer
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies local quality by creating different clearance zones at different locations within the opening. The first edge is positioned closer to the terminal while the second edge is positioned farther away, creating a non-uniform distribution of clearance space. This local differentiation allows the opening to be sufficiently large to accommodate terminal position deviation and improve reliability, while the strategically positioned edges prevent the terminal from contacting the insulating layer at critical locations

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS9769944B2Semiconductor memory device
Publication Date: 2017.09.19 KIOXIA CORP
  • US9769944B2 patent drawing
  • US9769944B2 patent drawing
  • US9769944B2 patent drawing

AI summary

According to one embodiment, a semiconductor memory device includes a conductor layer including a first terminal, and a first insulating layer including a first opening. The first opening includes a first edge and a second edge, a distance between the second edge and the first terminal being larger than a distance between the first edge and the first terminal.