Asymmetric Transistor Contacts for Low Resistance and Capacitance
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Solution Overview
Problem
Larger source/drain contacts in transistors reduce resistance but increase parasitic capacitance, leading to a higher propensity for shorting and reducing process yield.
Innovation Solution
Implement asymmetric source and drain contacts, with one contact on the frontside and the other on the backside, where the backside contact is larger to reduce resistance without increasing parasitic capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the source/drain contacts are made larger to reduce resistance, then electrical performance improves, but parasitic capacitance increases leading to higher shorting propensity and reduced process yield
Solution Approach 1:
The patent applies asymmetry by making the source contact and drain contact have different sizes. Specifically, one contact (e.g., drain contact) is made larger than the other (source contact). This asymmetric design allows the larger contact to provide lower resistance while the smaller contact maintains lower parasitic capacitance, thereby resolving the contradiction between reducing resistance and minimizing parasitic capacitance.
Solution Approach 2:
The patent applies local quality by optimizing the size of each contact individually based on its specific function and location. The source contact region and drain contact region are assigned different contact sizes tailored to their respective electrical characteristics and requirements. This localized optimization allows each contact to perform its function optimally without compromising the other, resolving the contradiction between resistance reduction and capacitance control.
2Reliability
If the source/drain contacts are made larger to reduce resistance, then access resistance decreases, but the distance to gate contact decreases causing increased parasitic capacitance
Solution Approach 1:
The patent uses asymmetry to differentiate the sizes of source and drain contacts. By making one contact larger and the other smaller, the design achieves lower overall resistance while maintaining adequate spacing from the gate contact. The asymmetric configuration allows strategic placement where the larger contact is positioned to minimize resistance impact while the smaller contact maintains proper clearance from the gate.
Solution Approach 2:
The patent applies local quality by assigning different contact sizes to source and drain regions based on their specific electrical requirements and spatial relationships with the gate. Each contact is locally optimized: one contact is enlarged to reduce resistance where it matters most, while the other contact is kept smaller to maintain proper distance from the gate contact, thus locally resolving the contradiction between resistance and spacing.
Data Source
AI summary
Semiconductor devices and systems with asymmetric source and drain contacts, and methods of forming the same, are disclosed herein. In one example, a semiconductor device includes a source, a drain, a source contact, a drain contact, a channel, and a gate. The source contact is coupled to the source and the drain contact is coupled to the drain, and the source contact and the drain contact are asymmetric. The source and the drain are coupled via the channel, and the gate is coupled to the channel.