Asymmetric TSV for Direct Chip-to-Chip Electrical Connection
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Solution Overview
Problem
Conventional through silicon via (TSV) technology requires additional conductive structures for electrical connection between stacked chips, complicating the manufacturing process and increasing costs.
Innovation Solution
A semiconductor structure and manufacturing method where a TSV penetrates through both chips with an inclined sidewall, allowing for direct electrical connection between metal layers without additional conductive structures, and an insulating layer is formed only on the sidewall of the first part, simplifying the process and reducing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional TSV process forms TSV in only one chip with additional conductive structures for connection, then electrical connection between stacked chips is achieved, but the structure and manufacturing process become more complicated
Solution Approach 1:
The patent merges the TSV formation process across multiple chips by bonding chips together first and then forming a single continuous TSV that penetrates through both chips and their metal interconnection layers. This combines what were previously separate TSV formations and connection structures into one integrated process, eliminating the need for additional conductive structures while achieving reliable electrical connection.
Solution Approach 2:
The TSV structure in the patent serves multiple functions simultaneously: it acts as an interlayer via for electrical connection, a through-silicon via for signal transmission, and an integrated pathway that passes through multiple chips and metal layers. This multi-functional design eliminates the need for separate connection structures, simplifying both the device structure and manufacturing process.
2Device complexity
If TSV penetrates through both chips with inclined sidewall and direct metal layer connection, then additional conductive structures are eliminated, but manufacturing precision requirements increase
Solution Approach 1:
The patent employs an asymmetric TSV design where the sidewall transitions from vertical in the first chip to inclined in the second chip. This asymmetric geometry allows the TSV to navigate through the bonded interface of two chips at different heights, enabling direct connection between metal layers while accommodating the physical constraints of chip stacking and bonding processes.
Solution Approach 2:
The TSV structure exhibits different geometric properties in different regions: a vertical sidewall portion in the first chip where precise alignment is less critical, and an inclined sidewall portion in the second chip where the angle provides tolerance for bonding variations. This local differentiation of geometric quality allows the structure to meet connection requirements while being manufacturable with standard precision.
Data Source
AI summary
The present application provides a semiconductor structure and a manufacturing method thereof. The manufacturing method includes: providing a stacked structure, the stacked structure includes a first chip and a second chip; forming a through silicon via (TSV) in the stacked structure, the TSV includes a first part and a second part communicating with the first part, a sidewall of the first part is a vertical sidewall, and a sidewall of the second part is an inclined sidewall; forming an insulating layer on the sidewall of the first part; and forming a conductive layer in the TSV.