Asymmetric Vertical Current Injection in III-V Electro-Optical Devices

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Solution Overview

Problem

The configuration of symmetric top and bottom ohmic contacts in III-V optoelectronic devices leads to a weak overlap between the gain profile and the fundamental mode position, resulting in poor performance in terms of output power and threshold currents.

Innovation Solution

An asymmetric electrode configuration is implemented, where the two sets of ohmic contacts are arranged on opposite sides of the median vertical plane, allowing for a more homogeneous electric field and improved overlap between the recombination zone and the fundamental mode position, while maintaining vertical current injection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If symmetric top and bottom ohmic contacts are used, then the device structure is simple and manufacturing is easier, but the overlap between gain profile and fundamental mode position is weak resulting in poor output power and high threshold currents

Engineering Contradiction:
Improveease of manufactureVSAvoidoutput power
Core Design Contradiction:
Ease of manufactureVSPower

Solution Approach 1:

The patent applies asymmetry by positioning the top and bottom ohmic contacts at different lateral locations relative to the waveguide mode profile. Specifically, one contact is positioned at a first lateral location while the other contact is positioned at a second lateral location, creating an asymmetric current injection pattern that aligns the recombination zone with the fundamental mode position, thereby improving gain overlap and output power

Inventive Principle:
Principle #4Asymmetry

2Power

If asymmetric electrode configuration is used, then the overlap between recombination zone and fundamental mode position is improved resulting in higher output power, but the access resistance increases

Engineering Contradiction:
Improveoutput powerVSAvoidaccess resistance
Core Design Contradiction:
PowerVSLoss of energy

Solution Approach 1:

The patent applies local quality by optimizing the electrical properties at different locations. The asymmetric contact configuration is combined with a graded index separate confinement heterostructure that provides localized carrier confinement and field shaping. This allows the device to achieve better mode overlap and reduced access resistance by tailoring the local electrical and optical properties at each contact location and along the current path

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach results in higher output power and lower threshold currents, despite increased access resistances, by ensuring balanced electron and hole injection within the mode region.

Implementation Method 1

using an asymmetric electrode configuration makes it possible to shape the electric field such as for it to be laterally more homogeneous

Methodology Applied
Scientific EffectElectric field: Electric Field

Implementation Method 2

a stack of III-V semiconductor gain materials

Methodology Applied
Scientific EffectElectroluminescence: Electroluminescence

Data Source

PatentUS10447006B2Electro-optical device with asymmetric, vertical current injection ohmic contacts
Publication Date: 2019.10.15 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US10447006B2 patent drawing
  • US10447006B2 patent drawing
  • US10447006B2 patent drawing

AI summary

The present invention is notably directed to an electro-optical device. This device has a layer structure, which comprises a stack of III-V semiconductor gain materials, an n-doped layer and a p-doped layer. The III-V materials are stacked along a stacking direction z, which is perpendicular to a main plane of the stack. The n-doped layer extends essentially parallel to the main plane of the stack, on one side thereof. The p-doped layer too extends essentially parallel to this main plane, but on another side thereof. A median vertical plane can be defined in the layer structure, which plane is parallel to the stacking direction z and perpendicular to the main plane of the stack. Now, the device further comprises two sets of ohmic contacts, wherein the ohmic contacts of each set are configured for vertical current injection in the stack of III-V semiconductor gain materials.