Asymmetric Voltage Programming for Ferroelectric Memory Cells

Solution Overview

Problem

Existing methods for programming ferroelectric random-access memory (FeRAM) cells with metal oxide channels using gate voltages of opposite polarities and equal magnitudes result in limited threshold voltage differences and memory windows, making it difficult to reliably determine stored logic levels.

Innovation Solution

An asymmetric write method is employed, where a FeRAM cell is programmed using a first write operation with a gate voltage of positive polarity and a first magnitude, and a second write operation with a gate voltage of negative polarity and greater magnitude, allowing for higher threshold voltages and increased memory windows by adjusting the gate electrode work function by less than 0.5 electron-volts.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If gate voltages of opposite polarities and equal magnitudes are used to program FeRAM cells, then the programming operation is simplified, but the threshold voltage differences and memory windows are limited

Engineering Contradiction:

Improveprogramming operation simplicityVSAvoidthreshold voltage difference

Core Design Contradiction:

Ease of operationVSReliability

Solution Approach 1:

The patent applies asymmetry by using gate voltages of opposite polarities but unequal magnitudes for programming FeRAM cells. Specifically, a first gate voltage with positive polarity and a second gate voltage with negative polarity are used, where the magnitude of the negative voltage is greater than the magnitude of the positive voltage. This asymmetric voltage application creates larger threshold voltage differences and expanded memory windows while maintaining reliable logic level determination.

Inventive Principle:

Principle #4Asymmetry

2Device complexity

If gate voltages of opposite polarities and equal magnitudes are used to program FeRAM cells, then the programming process is symmetric and simple, but the memory window is limited

Engineering Contradiction:

Improveprogramming process complexityVSAvoidmemory window size

Core Design Contradiction:

Device complexityVSManufacturing precision

Solution Approach 1:

The patent applies asymmetry by using gate voltages of opposite polarities but unequal magnitudes for programming FeRAM cells. Specifically, a first gate voltage with positive polarity and a second gate voltage with negative polarity are used, where the magnitude of the negative voltage is greater than the magnitude of the positive voltage. This asymmetric voltage application creates larger threshold voltage differences and expanded memory windows while maintaining reliable logic level determination.

Inventive Principle:

Principle #4Asymmetry

Solution Approach 2:

The patent changes the voltage magnitude parameter asymmetrically for programming operations. By adjusting the gate voltage magnitudes to be unequal (with the negative voltage having greater magnitude), the patent optimizes the threshold voltage separation and memory window size, achieving better discrimination between stored logic levels while maintaining a relatively simple programming process.

Inventive Principle:

Principle #35Parameter changes

3Reliability

If traditional symmetric write operations are used, then the gate electrode work function adjustment is large (approximately 1 eV), but the threshold voltage control is less precise

Engineering Contradiction:

Improvelogic level determination reliabilityVSAvoidgate electrode work function adjustment precision

Core Design Contradiction:

ReliabilityVSManufacturing precision

Solution Approach 1:

The patent changes the voltage magnitude parameter asymmetrically for programming operations. By adjusting the gate voltage magnitudes to be unequal (with the negative voltage having greater magnitude), the patent optimizes the threshold voltage separation and memory window size, achieving better discrimination between stored logic levels while maintaining a relatively simple programming process.

Inventive Principle:

Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables higher threshold voltages and expanded memory windows, enhancing the reliability of determining stored logic levels in FeRAM cells, compared to traditional methods, and allows for more precise gate electrode work function adjustments.

Implementation Method 1

the gate structure includes a ferroelectric layer

Methodology Applied

Scientific EffectFerroelectric effect:

Implementation Method 2

the channel layer includes a metal oxide material

Methodology Applied

Scientific EffectElectron conduction: Conduction (electrical)

Data Source

PatentUS11508427B2Memory circuit and write method

Publication Date: 2022.11.22 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A memory circuit includes a memory array including a plurality of memory cells, each memory cell including a gate structure including a ferroelectric layer and a channel layer adjacent to the gate structure, the channel layer including a metal oxide material. A driver circuit is configured to output a gate voltage to the gate structure of a memory cell, the gate voltage having a positive polarity and a first magnitude in in a first write operation and a negative polarity and a second magnitude in in a second write operation, and to control the second magnitude to be greater than the first magnitude.