Asymmetric Voltage Scheme for MRAM Bit Cell Reliability

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Magnetoresistive random access memory (MRAM) technologies face challenges in reliably writing '0' states due to source loading effects and parasitic resistances, which increase power consumption and reduce switching reliability in magnetic bit cell elements.

Innovation Solution

An asymmetric switching scheme is implemented, where one bit/source line is coupled to the core network voltage and the other to the I/O network voltage, with the I/O voltage being higher, to improve switching characteristics and reduce parasitic resistance, ensuring reliable state changes in magnetic bit cell elements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a symmetric voltage scheme is used in magnetic bit cell elements, then the circuit design is simple, but the source loading effects and parasitic resistances increase power consumption and reduce switching reliability

Engineering Contradiction:
Improveswitching reliabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent applies asymmetry by implementing an asymmetric voltage switching scheme where the first voltage level (e.g., 1.8V) is higher than the second voltage level (e.g., 1.2V). This asymmetric voltage configuration compensates for source loading effects and parasitic resistances in the magnetic bit cell element, thereby improving switching reliability while managing power consumption effectively.

Inventive Principle:
Principle #4Asymmetry

Solution Approach 2:

The patent changes the voltage parameters by applying different voltage levels (first voltage > second voltage) to the magnetic bit cell element during write operations. This parameter change approach allows optimization of the switching characteristics by providing sufficient voltage margin to overcome parasitic effects, thus resolving the contradiction between reliability and power consumption.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If higher voltage is applied to overcome parasitic resistances, then switching reliability improves, but power consumption increases

Engineering Contradiction:
Improveswitching reliabilityVSAvoidenergy loss
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The asymmetric voltage scheme applies a higher first voltage only when needed to overcome parasitic resistances during state transitions, while using a lower second voltage for maintaining states. This selective application of higher voltage reduces overall energy loss while ensuring switching reliability when required.

Inventive Principle:
Principle #4Asymmetry

Solution Approach 2:

The patent employs periodic voltage transitions where the higher first voltage is applied intermittently during write operations rather than continuously. This periodic application of higher voltage ensures reliable switching when needed while minimizing continuous energy loss, thus resolving the contradiction between reliability and energy loss.

Inventive Principle:
Principle #19Periodic action

3Reliability

If asymmetric voltage scheme is implemented, then switching reliability and efficiency improve, but device complexity increases

Engineering Contradiction:
Improveswitching reliabilityVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The asymmetric voltage scheme introduces different voltage levels for write operations, which improves switching reliability. The complexity increase is managed by integrating this asymmetric voltage generation into the existing memory controller architecture, using standard voltage regulation techniques to maintain practical device complexity levels.

Inventive Principle:
Principle #4Asymmetry

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enhances the reliability and efficiency of writing operations in MRAM by ensuring sufficient voltage levels are maintained across terminals, reducing power consumption, and improving switching speed and reliability of magnetic bit cell elements.

Implementation Method 1

MRAM sensing exploits the magnetoresistive effect that occurs in magnetic tunnel junctions (MTJs)

Methodology Applied
Scientific EffectMagnetoresistive effect: Magnetoresistance

Implementation Method 2

Writing the data to the MTJ element 106 involves application of sufficient current or voltage to switch the magnetic orientation of the free magnetic layer

Methodology Applied
Scientific EffectSpin torque transfer:

Data Source

PatentUS9142278B2Asymmetric write scheme for magnetic bit cell elements
Publication Date: 2015.09.22 QUALCOMM INC
  • US9142278B2 patent drawing
  • US9142278B2 patent drawing
  • US9142278B2 patent drawing

AI summary

A first write driver applies a first voltage above a fixed potential to a first terminal. A second write driver applies a second voltage that is higher above the fixed potential than the first voltage to a second terminal. There is at least one magnetic tunnel junction (MTJ) structure coupled at the first terminal at a first side to the first write driver and coupled at the second terminal at a second side to the second write driver. The first side of the MTJ structure receives the first voltage and the second side of the MTJ structure receives a ground voltage to change from a first state to a second state. The second side of the MTJ structure receives the second voltage and the first side of the MTJ structure receives the ground voltage to change from the second state to the first state.