Asymmetric Voting Thresholds for SERDES Clock Data Recovery
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Solution Overview
Problem
At-rate clock data recovery in serializer/deserializer (SERDES) circuits faces challenges in accurately determining clocking positions due to factors like clock jitter and noisy data, leading to suboptimal sampling and increased power consumption, especially in high-data-rate environments.
Innovation Solution
Implementing a controllable early/late offset system with asymmetric voting thresholds to de-skew voting results and tune the clock data recovery (CDR) to a more optimal position, improving link margin and data recovery by adjusting the advance and retard thresholds.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional symmetric voting thresholds are used in at-rate CDR, then the system structure remains simple, but the CDR locking position becomes inaccurate due to slope asymmetry around the first precursor zero crossing
Solution Approach 1:
The patent applies asymmetry by implementing different voting thresholds for advance and retard operations. Specifically, the retard threshold is set to a different value than the advance threshold to compensate for the slope asymmetry inherent in the channel pulse response around the first precursor zero crossing. This asymmetric threshold configuration corrects the voting bias and achieves accurate CDR locking position without requiring complex additional circuitry.
Solution Approach 2:
The patent changes the voting threshold parameters to optimize CDR performance. By adjusting the advance and retard thresholds to specific asymmetric values, the system compensates for the uneven slope characteristics of the pulse response. This parameter adjustment allows the CDR to lock accurately at the desired position while maintaining simple circuit implementation.
2Reliability
If the CDR sampling point drifts to early or late side relative to incoming data, then the system can handle clock drift and jitter, but the voting results become skewed and tracking behavior becomes inconsistent
Solution Approach 1:
The asymmetric voting thresholds compensate for the skew that occurs when the CDR sampling point drifts relative to the incoming data. By having different thresholds for advance and retard operations, the system maintains balanced tracking behavior even when operating conditions vary, ensuring consistent voting results and reliable data recovery.
Solution Approach 2:
The CDR system uses feedback from the voting process to continuously adjust the sampling position. The asymmetric thresholds ensure that this feedback mechanism works correctly even when the sampling point drifts, maintaining stable and consistent tracking behavior by compensating for the inherent asymmetry in the voting results.
3Productivity
If high data rates are used to increase productivity, then communication speed improves, but sampling uncertainty increases (20-30 mV) making zero comparisons difficult
Solution Approach 1:
The patent changes the voting threshold parameters to account for the increased sampling uncertainty at high data rates. By setting asymmetric thresholds that consider the 20-30 mV sampling uncertainty, the system maintains reliable voting decisions even when zero comparisons become difficult due to noise and jitter at higher communication rates.
Data Source
AI summary
Embodiments include systems and methods for applying a controllable early/late offset to an at-rate clock data recovery (CDR) system. Some embodiments operate in context of a CDR circuit of a serializer/deserializer (SERDES). For example, slope asymmetry around the first precursor of the channel pulse response for the SERDES can tend to skew at-rate CDR determinations of whether to advance or retard clocking. Accordingly, embodiments use asymmetric voting thresholds for generating each of the advance and retard signals in an attempt to de-skew the voting results and effectively tune the CDR to a position either earlier or later than the first precursor zero crossing (i.e., h(−1)=0) position. This can improve link margin and data recovery, particularly for long data channels and/or at higher data rates.