Asymmetrical Chamfer Crack Detection Circuit for Semiconductor Yield
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Solution Overview
Problem
Semiconductor chips with normal circuit structures are often falsely determined to be abnormal due to cracks that do not spread to the circuit structure, leading to decreased yield in semiconductor devices, as existing crack detection circuits are triggered by cracks that may not affect the circuit.
Innovation Solution
The semiconductor chip design incorporates a crack detection circuit with asymmetrical chamfer lines and guard rings to prevent false abnormal determinations, where the chamfer lines are inclined at different angles and connected between main lines at corners of the substrate, ensuring the crack detection circuit does not detect cracks that do not spread to the circuit structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a crack detection circuit is formed along the edge of the semiconductor substrate to surround the circuit structure, then cracks spreading to the circuit structure can be detected, but false abnormal determinations occur when cracks do not spread to the circuit structure
Solution Approach 1:
The chamfer lines are configured with asymmetrical angles relative to the main lines. Specifically, at each corner of the semiconductor substrate, the chamfer line forms a first angle with a first main line and a second angle with a second main line, where the first angle is different from the second angle. This asymmetrical configuration ensures that the crack detection circuit only detects cracks that spread to the circuit structure, eliminating false abnormal determinations while maintaining reliable crack detection capability.
2Difficulty of detecting and measuring
If the crack detection circuit detects any crack on the semiconductor substrate, then crack presence is identified, but normal chips are falsely determined as abnormal
Solution Approach 1:
The crack detection circuit is configured with spatially varying properties through the asymmetrical chamfer lines at different corners of the semiconductor substrate. Each corner has chamfer lines with specific angles tailored to that location, creating local detection zones that only respond to cracks threatening the circuit structure. This local quality approach enables precise differentiation between harmful and harmless cracks.
Solution Approach 2:
The chamfer lines act as intermediary elements between the main lines and the corners of the semiconductor substrate. These intermediary chamfer lines with asymmetrical angles serve as selective mediators that allow current flow unless a crack actually spreads to the circuit structure, thereby preventing false detections while maintaining the detection function.
Data Source
AI summary
A semiconductor chip may include a semiconductor substrate and a crack detection circuit. The semiconductor substrate may include a circuit structure. The crack detection circuit may include main lines and a chamfer lines. The main lines may be formed in the semiconductor substrate to surround the circuit structure. The chamfer lines may be formed in corners of the semiconductor substrate. The chamfer lines may be connected between the main lines. A first angle may be formed between each of the chamfer lines and any one of the two main lines perpendicular to each other. A second angle wider than the first angle may be formed between each of the chamfer lines and the other main line.