Asymmetrical GaN HEMT Bidirectional Switch
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Solution Overview
Problem
Conventional gallium nitride (GaN) based field effect transistors face challenges in providing bidirectional asymmetrical blocking capabilities, which are essential for optimal performance in devices like direct high voltage buck converters and dual boost bridgeless PFCs, due to limitations in minimizing Rds-on and capacitive loss, and managing parasitic inductances and voltage overshoots.
Innovation Solution
A high electron mobility transistor (HEMT) power device with an asymmetrical bidirectional blocking configuration, featuring a hetero-junction structure and asymmetrically disposed gate electrodes, which generates a two-dimensional electron gas (2DEG) layer and includes field plates to achieve asymmetric blocking, allowing for flexible control of switching performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If conventional symmetrical blocking switches are used, then bidirectional blocking capability is achieved, but Rds-on and capacitive loss increase causing unnecessary energy loss
Solution Approach 1:
The patent applies asymmetry by configuring the gate electrode at different distances from the first and second source/drain electrodes. Specifically, the gate electrode is disposed at a first distance from the first source/drain electrode and a second distance from the second source/drain electrode, where the first distance is different from the second distance. This asymmetrical configuration enables different blocking voltages in each direction, optimizing Rds-on and capacitive loss for bidirectional applications.
2Loss of energy
If asymmetrical blocking capability is implemented, then energy loss is reduced, but device configuration complexity increases
Solution Approach 1:
The patent applies local quality by creating different electrical characteristics in different regions of the device. The hetero-junction structure comprises a first semiconductor layer interfacing a second semiconductor layer of two different band gaps, generating an interface layer as a two-dimensional electron gas (2DEG) layer. Combined with the asymmetrical gate positioning, this creates locally optimized electrical properties that reduce energy loss while maintaining manageable device complexity.
3Reliability
If conventional symmetrical configuration is used, then manufacturing is simpler, but parasitic inductances cause asymmetrical blocking and voltage overshoots
Solution Approach 1:
The patent addresses parasitic inductances by implementing asymmetrical gate electrode positioning. The gate electrode is deliberately placed at different distances from each source/drain electrode, which compensates for the inherent asymmetry in parasitic inductances. This allows for better control over voltage overshoots and blocking characteristics in bidirectional applications, while the hetero-junction structure provides a manufacturable platform for this asymmetrical configuration.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution minimizes unnecessary losses and improves control over parasitic inductances and voltage stress, enabling more efficient and flexible operation of GaN-based switches in bidirectional applications.
Implementation Method 1
a hetero-junction structure comprising a first semiconductor layer interfacing a second semiconductor layer of two different band gaps thus generating an interface layer as a two-dimensional electron gas (2DEG) layer
Data Source
AI summary
A high electron mobility transistor (HEMT) gallium nitride (GaN) bidirectional blocking device includes a hetero-junction structure comprises a first semiconductor layer interfacing a second semiconductor layer of two different band gaps thus generating an interface layer as a two-dimensional electron gas (2DEG) layer. The HEMT GaN bidirectional blocking device further includes a first source/drain electrode and a second source/drain electrode disposed on two opposite sides of a gate electrode disposed on top of said hetero-junction structure for controlling a current flow between the first and second source/drain electrodes in the 2DEG layer wherein the gate electrode is disposed at a first distance from the first source/drain electrode and a second distance from the second source/drain electrode and the first distance is different from the second distance.