Asymmetrical Pixel Shielding Pattern for Scan Signal Kickback
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Solution Overview
Problem
Display devices experience deviations in driving current and luminance, as well as image stains, due to the influence of scan signals on adjacent pixel transistors.
Innovation Solution
Incorporating asymmetrical shielding patterns and gate electrode configurations between adjacent pixel circuit portions, with overlapping capacitors and conductive layers, to stabilize voltage levels and reduce kickback effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If a scan signal is applied to a pixel, then the pixel can be activated to display an image, but adjacent pixel transistors are affected causing deviations in driving current and luminance
Solution Approach 1:
A shielding pattern is introduced as an intermediary element between adjacent pixel circuit portions. This shielding pattern acts as a mediator that blocks the harmful electromagnetic interference from the scan signal from directly affecting adjacent pixels, while allowing the normal operation of each pixel to proceed independently.
Solution Approach 2:
The shielding pattern employs an asymmetrical design with a protrusion toward the first pixel circuit portion. This asymmetric configuration optimizes the shielding effect by directing the interference blocking toward the more vulnerable pixel circuit, while maintaining compatibility with the overall symmetrical pixel layout and manufacturing processes.
2Ease of operation
If a scan signal is applied to a pixel, then the pixel can be activated to display an image, but image stains occur due to interference with adjacent pixels
Solution Approach 1:
The shielding pattern serves as a physical barrier that prevents the scan signal interference from propagating to adjacent pixels. By positioning this intermediary structure between adjacent pixel circuit portions, the harmful electromagnetic fields are blocked before they can cause image stains, while pixel activation remains unaffected.
3Reliability
If a shielding pattern is added between adjacent pixel circuit portions, then interference is reduced, but device complexity increases
Solution Approach 1:
The shielding pattern uses an asymmetrical design with a protrusion toward the first pixel circuit portion. This asymmetric configuration optimizes the shielding effect by directing the interference blocking toward the more vulnerable pixel circuit, while maintaining compatibility with the overall symmetrical pixel layout and manufacturing processes.
Solution Approach 2:
The shielding pattern is integrated into the existing pixel circuit structure by merging it with the gate electrode configurations and conductive layers. Rather than adding a completely separate component, the shielding function is combined with existing structural elements, thereby reducing the actual increase in device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed design minimizes deviations in driving current and luminance, reducing image defects by stabilizing voltage levels and mitigating kickback effects between adjacent pixels.
Implementation Method 1
The first gate electrode and the lower electrode may overlap each other to form a first capacitor
Implementation Method 2
The shielding pattern may transmit a constant voltage
Implementation Method 3
The first gate electrode and the upper electrode may overlap each other to form the first capacitor
Data Source
AI summary
A display device includes: a substrate; a first scan line and a second scan line disposed on the substrate; a data line intersecting the first scan line and the second scan line; a first pixel circuit portion and a second pixel circuit portion adjacent to each other in a first direction with the data line therebetween; and a shielding pattern disposed between the first pixel circuit portion and the second pixel circuit portion, wherein each of the first pixel circuit portion and the second pixel circuit portion includes a first transistor including a first gate electrode connected to a first node, and a first electrode connected to a second node; and a second transistor connected between the first node and the data line and including a second gate electrode capable of receiving a first scan signal, and the shielding pattern includes an asymmetrical portion protruding toward the first pixel circuit portion in a plan view.