Asymmetrical Row Decoder for Non-Volatile Memory
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Solution Overview
Problem
Existing non-volatile memory devices with symmetrical row decoders face challenges in efficiently selecting and managing word lines, leading to increased voltage drops and area occupation, which affects the selection quality and efficiency of memory cells.
Innovation Solution
An asymmetrical row decoder design is introduced, where the pull-up circuits are centralized and arranged asymmetrically, allowing for reduced voltage drops on selected word lines without increasing area occupation, and enabling efficient selection and deselection of word lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a symmetrical row decoder design is used, then the structure is balanced and easy to manufacture, but the area occupation increases and voltage drops are not optimized
Solution Approach 1:
The patent applies asymmetry by redesigning the row decoder structure to be asymmetrical rather than symmetrical. The pull-up circuits are strategically positioned on only one side of the memory array, creating an asymmetrical layout that reduces the overall decoder area while maintaining functional effectiveness in managing voltage drops and selecting word lines.
2Reliability
If pull-up circuits are distributed symmetrically, then the voltage management is balanced, but the area occupation increases
Solution Approach 1:
The patent merges the pull-up circuits into a centralized location on one side of the memory array rather than distributing them symmetrically across both sides. This consolidation maintains effective voltage management for word line selection while significantly reducing the total area occupied by the decoder circuitry.
3Ease of operation
If conventional row decoder design is used, then the selection capability is sufficient, but the voltage drops on word lines are not optimized
Solution Approach 1:
The patent introduces an asymmetrical pull-up circuit configuration that acts as an intermediary mechanism to actively manage and compensate for voltage drops on word lines. By positioning these circuits strategically on one side, they effectively maintain voltage levels during word line selection without requiring a symmetrical distribution that would increase area.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The asymmetrical row decoder reduces area usage while maintaining selection quality, particularly in memory devices with active-line consumption, by decoupling selected word lines from ground efficiently and charging/discharging them effectively.
Implementation Method 1
Access (or selection) devices, for example bipolar or MOS transistors, are connected to the heaters and selectively enable passage of a programming electric current
Implementation Method 2
this electric current, by the Joule effect, generates the heat required for phase change
Implementation Method 3
These materials can switch between a disorderly, amorphous, phase and an orderly, crystalline or polycrystalline, phase; different phases are characterized by different values of resistivity
Data Source
Figure 1
Figure 2A
Figure 2B
AI summary
A non-volatile memory device (100) including an array (102A_R) of memory cells (3) coupled to word lines (WL_dx) and a row decoder (105), which includes a first and a second pull-down stage (115L, 115R), which are arranged on opposite sides of the array (102A_R), and include, respectively, for each word line (WL_dx), a corresponding first pull-down switching circuit (112L) and a corresponding second pull-down switching circuit (112R), which are coupled to a first point (Esx) and a second point (Edx), respectively, of the first word line (WL_dx). The row decoder (105) moreover comprises a pull-up stage (118), which includes, for each word line (WL_dx), a corresponding pull-up switching circuit (122R, 126R, 199), which can be electronically controlled in order to: couple the first point (Esx) to a supply node (VDD) in the step of deselection of the word line (WL_dx); and decouple the first point (Esx) from the supply node (VDD) in the step of selection of the word line (WL_dx).