Asymmetrical Shield Interconnects for High-Speed Signal Integrity

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Solution Overview

Problem

Transmission lines experience significant signal degradation due to insertion losses and impedance discontinuities, particularly at high frequencies above 56 GHz, leading to increased signal loss and radiation issues.

Innovation Solution

A low loss horizontal interconnect design with an asymmetrical configuration that includes a first reference plane with spaced apart shield portions, dielectric layers, and asymmetrically aligned conductors, which reduces substrate layer counts and minimizes end-to-end return loss while maintaining target impedance, thereby reducing channel radiation and resonating frequencies.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If conventional transmission line configurations are used, then device complexity is reduced, but insertion loss and impedance discontinuity increase significantly at high frequencies above 56 GHz

Engineering Contradiction:

Improveinsertion lossVSAvoidsubstrate layer count

Core Design Contradiction:

Loss of energyVSDevice complexity

Solution Approach 1:

The patent employs asymmetrical shield portions where the first shield portion has a different width than the second shield portion. This asymmetrical configuration optimizes the electromagnetic field distribution to reduce insertion loss and impedance discontinuity at high frequencies while maintaining a reduced substrate layer count, thus resolving the contradiction between low loss and device complexity.

Inventive Principle:

Principle #4Asymmetry

Solution Approach 2:

The patent applies different shield portion widths at different locations along the transmission line. The first shield portion has a wider width near the signal source while the second shield portion has a narrower width near the load, creating localized impedance transformations that minimize reflections and insertion loss without requiring additional substrate layers.

Inventive Principle:

Principle #3Local quality

2Object-affected harmful factors

If conventional symmetrical transmission lines are used, then manufacturing is simpler, but channel radiation and resonating frequencies increase

Engineering Contradiction:

Improvechannel radiationVSAvoidshield configuration complexity

Core Design Contradiction:

Object-affected harmful factorsVSEase of manufacture

Solution Approach 1:

The asymmetrical shield configuration with different widths for first and second shield portions creates an optimized electromagnetic field containment that reduces channel radiation and suppresses resonating frequencies. Although the shield configuration is more complex, it can be integrated into existing manufacturing processes with minimal additional complexity.

Inventive Principle:

Principle #4Asymmetry

3Loss of energy

If larger transmission line widths are used to decrease insertion loss, then signal integrity improves, but device area increases

Engineering Contradiction:

Improveinsertion lossVSAvoidinterconnect area

Core Design Contradiction:

Loss of energyVSArea of moving object

Solution Approach 1:

The patent optimizes the vertical dimension by using multiple substrate layers with strategically positioned shield portions at different heights. This three-dimensional shield configuration reduces insertion loss through improved field containment without requiring larger lateral dimensions, thus maintaining compact device area while achieving low loss performance.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS11456516B2Low loss high-speed interconnects

Publication Date: 2022.09.27 INTEL CORP

AI summary

An electronic device and associated methods are disclosed. In one example, the electronic device can include an assembly having asymmetrically situated conductors. In selected examples, the assembly includes a ground plane, a central shield portion, a first side shield portion on a first side, a second side shield portion on a second side, a first conductor asymmetrically situated between the central shield portion and the first side shield portion, a second conductor asymmetrically situated between the central shield portion and the second side shield portion, and dielectric within the assembly.