Asynchronous ADC Reconstruction Using Augmented Least Squares
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Solution Overview
Problem
Traditional asynchronous ADCs suffer from excessive oversampling and complexity in reconstructing asynchronously-sampled signals, leading to power wastage and difficulty in processing non-uniform samples, which are not efficiently convertible to synchronous samples.
Innovation Solution
The proposed solution involves an asynchronous ADC architecture with at least three voltage comparators that progressively narrow the voltage range and generate 2-tuple values, combined with a digital reconstructor and resampler to create synchronous samples, using algorithms like Akima and modified Akima for interpolation, and an augmented least squares solver for efficient reconstruction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If asynchronous ADC uses level crossing based sampling, then quantization error is reduced, but excessive oversampling occurs leading to power wastage
Solution Approach 1:
The patent implements dynamic comparator blanking where comparators are selectively enabled or disabled based on signal conditions. During periods where the signal is stable or outside the range of interest, comparators are blanked to reduce power consumption. The blanking control logic dynamically adjusts which comparators are active, creating a power-efficient asynchronous ADC that maintains measurement precision when needed while reducing oversampling-induced power waste.
Solution Approach 2:
The patent changes the operational parameters of the comparators by introducing a blanking signal that modifies their enable/disable state. This parameter change allows the system to transition between high-precision mode (comparators enabled) and low-power mode (comparators blanked), effectively resolving the contradiction between maintaining quantization accuracy and reducing power consumption from excessive oversampling.
2Adaptability or versatility
If asynchronous samples are converted to synchronous samples, then signal processing compatibility is improved, but computational complexity increases
Solution Approach 1:
The patent segments the asynchronous-to-synchronous conversion process into distinct stages: timestamp generation, buffer storage, and reconstruction. By dividing the complex reconstruction task into manageable segments, the system achieves compatibility with synchronous signal processing while controlling computational complexity through modular architecture. Each segment handles a specific aspect of the conversion, making the overall process more tractable.
Solution Approach 2:
The patent introduces an intermediary buffer structure that stores asynchronous samples with their timestamps before reconstruction. This intermediary buffer acts as a mediator between the asynchronous sampling domain and the synchronous processing domain, allowing complex reconstruction algorithms to operate on organized data without directly complicating the core sampling mechanism. The buffer provides a structured interface that simplifies the overall system architecture.
Data Source
AI summary
A method, comprising: receiving a plurality of 2-tuples of asynchronously sampled inputs at an asynchronous to synchronous reconstructor; performing a coarse asynchronous to synchronous conversion using the plurality of 2-tuples to generate a plurality of low precision synchronous outputs; generating a high precision synchronous output, z0, using a plurality of asynchronous 2-tuples, low precision synchronous outputs after it, and its own high precision outputs from previous steps; calculating c0 and c−1 by summing future low precision outputs and the past high precision outputs after they are weighted with the appropriate windowed sinc. values and then subtracted from appropriate asynchronous samples; calculating, the four quantities “s−11”, “s01”, “s00” and “s−10” based on particular values of the windowed sinc. function; and using c0, c−1, s−11, s01, s00 and s−10, the high precision synchronous output of interest, z0 is generated.