Asynchronous Timing Analysis for Circuit Bottleneck Identification
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Solution Overview
Problem
Synchronous circuit designers face challenges in analyzing and optimizing asynchronous systems, as they lack knowledge about asynchronous implementations and identifying bottlenecks within these systems, which can affect performance.
Innovation Solution
A method to convert synchronous circuit designs into asynchronous representations, analyze critical paths in the asynchronous domain, and report bottlenecks back to the synchronous domain for modification, using a timing analysis system that includes conversion, identification, and reporting modules to facilitate performance improvement.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If synchronous circuit design methods are used, then design and testing are simplified with deterministic behavior, but the ability to identify and optimize performance bottlenecks in asynchronous implementations is lost
Solution Approach 1:
The patent introduces an intermediary system that includes a converter to transform synchronous circuit representations into asynchronous representations, and an analyzer to identify bottlenecks in the asynchronous domain. This intermediary infrastructure enables synchronous designers to leverage asynchronous optimization capabilities without directly implementing asynchronous design methods, thus resolving the contradiction between ease of synchronous design and ability to optimize asynchronous performance.
2Productivity
If asynchronous operation is used, then performance optimization opportunities arise, but design complexity and difficulty of analysis increase
Solution Approach 1:
The converter and analyzer system acts as an intermediary that handles the complexity of asynchronous analysis automatically. Designers can specify synchronous circuit behavior, and the system automatically generates asynchronous representations and identifies bottlenecks, thereby providing performance optimization opportunities while shielding designers from asynchronous analysis complexity.
Solution Approach 2:
The system enables self-service by automatically performing the complex task of converting synchronous representations to asynchronous representations and identifying bottlenecks without requiring designer expertise in asynchronous design. The automated conversion and analysis processes allow the system to serve itself in identifying optimization opportunities.
3Stability of the object's composition
If synchronous representations are used, then deterministic behavior is achieved, but the ability to leverage asynchronous implementation advantages is lost
Solution Approach 1:
The converter serves as an intermediary that translates deterministic synchronous representations into asynchronous representations, enabling the system to leverage asynchronous implementation advantages such as improved performance and reduced power consumption while maintaining the original synchronous design specifications. The analyzer then identifies bottlenecks in the asynchronous representation that can be addressed to further optimize performance.
Data Source
AI summary
Methods, systems, and circuits that implement timing analyses of an asynchronous system are described. A method may include converting a synchronous circuit design into an asynchronous representation, wherein a critical path may be identified. The critical path may be converted to a corresponding path in the synchronous circuit design. Additional methods, systems, and circuits are disclosed.