Asynchronous Circuit Testing via Scan Path Isolation

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Solution Overview

Problem

Testing asynchronous circuits with global or local feedback paths is challenging due to low controllability and observability, and conventional Automatic Test Pattern Generation (ATPG) techniques are inadequate for handling these complex feedback loops.

Innovation Solution

The implementation of Design-For-Test (DfT) features and ATPG modeling systems that convert asynchronous circuit elements with feedback loops into ATPG circuit models, providing feedback data as input to facilitate testing using conventional ATPG tools, and the use of Dual-rail Asynchronous Circuit Scan (DAC-scan) circuits with scan paths for independent control of feedback loops.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional ATPG testing techniques are used on asynchronous circuits with feedback loops, then the testing process becomes intractable, but the controllability and observability remain low

Engineering Contradiction:
Improvetesting effectivenessVSAvoidfeedback loop complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts feedback loops from the asynchronous circuit under test and places them into separate feedback circuit modules. This extraction allows the main testing process to proceed without being blocked by complex feedback paths, while the feedback loops are tested independently through dedicated control mechanisms.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces feedback control circuits as intermediary components between the test pattern generation system and the circuit under test. These intermediary circuits mediate the interaction by capturing, controlling, and injecting feedback signals, thereby enabling conventional ATPG tools to effectively test asynchronous circuits with feedback loops.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If asynchronous circuits are designed with global or local feedback paths, then functional capability is improved, but testing controllability and observability deteriorate

Engineering Contradiction:
Improvecircuit functionalityVSAvoidtesting controllability
Core Design Contradiction:
Adaptability or versatilityVSEase of operation

Solution Approach 1:

The patent segments the circuit into distinct functional components: the circuit under test with its feedback paths, separate feedback circuit modules, and control circuit modules. This segmentation allows independent control and observation of each segment, improving testing controllability while preserving the overall circuit functionality.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies different control strategies to different parts of the circuit. Feedback control circuits are strategically placed at specific locations where feedback loops originate or terminate, providing localized control over feedback signals. This local quality approach enables precise controllability at critical points without affecting the entire circuit's functional operation.

Inventive Principle:
Principle #3Local quality

3Productivity

If asynchronous circuits are designed with feedback loops, then computational capability is improved, but conventional testing methodologies become inadequate

Engineering Contradiction:
Improvecomputational capabilityVSAvoidtesting difficulty
Core Design Contradiction:
ProductivityVSDifficulty of detecting and measuring

Solution Approach 1:

The patent creates a test model that copies the structural and behavioral characteristics of the original asynchronous circuit with feedback loops. This test model includes replicated feedback paths and control mechanisms, allowing conventional ATPG tools to generate and apply test patterns effectively while maintaining fidelity to the original circuit's computational behavior.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS11500018B2Asynchronous circuits and test methods
Publication Date: 2022.11.15 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11500018B2 patent drawing
  • US11500018B2 patent drawing
  • US11500018B2 patent drawing

AI summary

Circuits, methods, and systems are provided which facilitate testing of asynchronous circuits having one or more global or local feedback loops. A circuit includes a data path and a scan path. The data path has an input configured to receive a data input signal, and a first output. The scan path includes a first multiplexer having a first input configured to receive the data input signal, a latch coupled to an output of the first multiplexer, a scan isolator coupled to an output of the latch, and a second multiplexer having a first input coupled to the first output of the data path and a second input coupled to an output of the scan isolator. The second multiplexer is configured to output a data output signal.