Asynchronous Circuit Timing Constraint Selection

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Solution Overview

Problem

Existing methods for selecting relative timing constraints (RTCs) in asynchronous circuits are inefficient, often taking hours or days to compute a suitable set, and may result in infeasible or difficult-to-implement solutions due to combinatorial explosions and logical contradictions.

Innovation Solution

A method for selecting RTCs that ensures the asynchronous circuit does not enter bad states by identifying a set of constraints associated with each bad state, where each constraint is unique and not implied by others, and prioritizing constraints with higher implementation margins, using techniques like Boolean Satisfiability (SAT) to reduce the solution space and eliminate non-minimal solutions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If existing methods for selecting relative timing constraints are used, then the circuit can operate correctly, but the computation time increases to hours or days

Engineering Contradiction:
Improvecorrect operation of asynchronous circuitVSAvoidcomputation time for selecting RTCs
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent segments the problem of selecting RTCs by dividing it into two distinct phases: (1) generating all possible RTCs from bad states, and (2) selecting a minimal subset using SAT solver. This segmentation allows each phase to be optimized independently, reducing overall computation time from hours/days to minutes.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary action by pre-generating all possible RTCs and their implications before the actual selection process. The implication graph is constructed in advance, allowing the SAT solver to work with pre-processed data rather than computing everything from scratch during selection.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If existing methods for selecting RTCs are used, then a set of constraints can be found, but the solution space explodes combinatorially

Engineering Contradiction:
Improveprevention of bad statesVSAvoidcomplexity of constraint selection process
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts only the essential RTCs by using the implication graph to identify which constraints are actually necessary. The SAT solver extracts a minimal subset of RTCs from the full set, removing redundant constraints and their implications, thereby reducing the complexity of the constraint selection process.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the parameter representation by transforming the constraint selection problem into a SAT problem with binary variables indicating whether each RTC is selected. This parameter transformation allows efficient exploration of the solution space using SAT solver techniques rather than exhaustive enumeration.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If more RTCs are selected to ensure correctness, then the circuit reliability improves, but the implementation difficulty increases

Engineering Contradiction:
Improvecorrectness of asynchronous circuitVSAvoidease of implementing RTCs
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent extracts a minimal subset of RTCs that are sufficient to prevent all bad states. By removing redundant constraints and their implications through the implication graph analysis, the solution provides only the necessary RTCs, reducing implementation difficulty while maintaining correctness.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies local quality by assigning different selection statuses to different RTCs based on their necessity. Each RTC is evaluated individually through the SAT solver, allowing the selection of only those constraints that are locally necessary for preventing specific bad states, rather than uniformly selecting all constraints.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS10839126B1Tools and methods for selection of relative timing constraints in asynchronous circuits, and asynchronous circuits made thereby
Publication Date: 2020.11.17 DIALOG SEMICONDUCTOR (UK) LTD
  • US10839126B1 patent drawing
  • US10839126B1 patent drawing
  • US10839126B1 patent drawing

AI summary

A method of selecting relative timing constraints for enforcing in an asynchronous circuit is presented. The method includes selecting one or more sets of relative timing constraints, which include a first set of relative timing constraints, wherein the first set of relative timing constraints meets the following criteria: i) the first set is suitable for preventing the asynchronous circuit from entering two or more bad states in which a correctness property of the asynchronous circuit is violated, and ii) the first set comprises a plurality of relative timing constraints, wherein each relative timing constraint within the first set is associated with a bad state whose associated relative timing constraints comprise this relative timing constraint but no other relative timing constraint that is implied by another relative timing constraint in the first set.