Automatic Asynchronous Circuit Verification via State Machine Analysis
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Solution Overview
Problem
Current techniques for verifying asynchronous circuits are inadequate due to their sensitivity to input changes, complexity in covering all possible interactions, and the manual development of stimulus generators and response checkers, which are error-prone and not thorough enough to detect failure conditions.
Innovation Solution
A method and system for automatically determining tests based on a circuit specification that includes state machines, allowing for the analysis and simulation of transitions and responses to verify that the circuit conforms to its specification, using a compiler to generate simulation models and test benches, and synthesizing the circuit from the specification.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If manual stimulus generators and response checkers are developed to verify asynchronous circuits, then verification coverage can be achieved, but the process becomes error-prone and not sufficiently thorough
Solution Approach 1:
The verification system automatically generates stimulus generators and response checkers from the state machine specification without manual intervention. The system serves itself by deriving test cases and verification logic directly from the circuit specification, eliminating human error while maintaining thorough verification coverage
Solution Approach 2:
A compiler acts as an intermediary between the state machine specification and the verification process. The compiler automatically translates the specification into executable verification code, including stimulus generators and response checkers, thereby resolving the contradiction between thoroughness and complexity
2Reliability
If all possible interactions in asynchronous circuits are covered during verification, then reliability improves, but the time and resources required increase significantly
Solution Approach 1:
The system performs preliminary analysis of the state machine specification to automatically identify and generate only the necessary test cases and verification scenarios. By preparing the verification plan in advance from the specification, the system achieves comprehensive coverage without exhaustive manual testing of all possible interactions
Solution Approach 2:
The compiler intermediary efficiently translates the specification into optimized verification code that automatically covers all necessary interactions. This automated translation process significantly reduces the time required compared to manual development while ensuring complete verification coverage
3Reliability
If manual verification methods are used for asynchronous circuits, then some verification can be performed, but failure conditions may be missed due to errors in manual development
Solution Approach 1:
The verification system automatically generates and executes test cases from the state machine specification without manual intervention. This self-service approach ensures that failure conditions are detected systematically without human error, while the automated process maintains ease of operation through simple specification-to-verification flow
Solution Approach 2:
The system provides automatic feedback by comparing actual circuit behavior against the specification-derived expected behavior. This feedback mechanism ensures that failure conditions are reliably detected while maintaining ease of operation through automated comparison and reporting
Data Source
AI summary
A method for determining one or more tests suitable for verifying that a circuit conforms to a specification is presented. The specification has at least one state machine. Example circuits are asynchronous circuits. The method includes analysing the specification to automatically determine the one or more tests for circuit verification.