Asynchronous Data Interface Using Dual Domain Pointers

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Solution Overview

Problem

Existing asynchronous data interfaces face challenges in synchronizing data between clock domains with different frequencies, requiring additional resources and limiting data transmission until metastability is resolved, which can throttle subsequent data writing and reading.

Innovation Solution

A data interface system utilizing a buffer and dual pointers (write and read) that function across both clock domains, enabling continuous data transmission without relying on fixed frequency or phase relationships, allowing data to be transmitted asynchronously as long as the buffer is neither full nor empty.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a single bit is used to cross clock domains to avoid multiple bits being latched in different clock cycles, then data transmission independence from clock ratios is achieved, but subsequent data writing is limited until the current data has been read by the destination

Engineering Contradiction:
Improveindependence from clock ratiosVSAvoiddata writing throughput
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The data transmission process is segmented into independent write and read operations using a buffer structure with write pointer and read pointer. The write pointer manages data entry into the buffer while the read pointer manages data exit, allowing writes to proceed independently of reads as long as the buffer is not full.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A buffer is introduced as an intermediary structure between the source and destination clock domains. This buffer decouples the write and read operations, allowing data to be written at different rates than it is read, thereby enabling independent data writing without waiting for destination reading to complete.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If frequency calculation is performed to determine data transmission timing, then accurate synchronization between clock domains is achieved, but additional system time and resources are required

Engineering Contradiction:
Improvesynchronization accuracyVSAvoidsystem resources
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The buffer structure with pointers enables the system to self-manage synchronization without external frequency calculation. The write pointer and read pointer automatically track data positions in the buffer, and the buffer full/empty conditions naturally regulate data flow between clock domains without requiring additional computational resources for frequency analysis.

Inventive Principle:
Principle #25Self-service

3Productivity

If data is transmitted asynchronously using buffer and pointers, then continuous data transmission is enabled independent of clock ratios, but buffer management complexity increases

Engineering Contradiction:
Improvedata transmission continuityVSAvoidbuffer management
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The buffer is pre-configured with a fixed size and structure before operation. The write pointer and read pointer are initialized to known positions, and the buffer boundaries are predetermined. This preliminary setup eliminates the need for dynamic buffer management decisions during operation, simplifying the overall management complexity while enabling continuous asynchronous data transmission.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS8131967B2Asynchronous data interface
Publication Date: 2012.03.06 GLOBALFOUNDRIES US INC
  • US8131967B2 patent drawing
  • US8131967B2 patent drawing
  • US8131967B2 patent drawing

AI summary

An interface system is disclosed. In one embodiment, the system includes a buffer that receives data from a source in a first clock domain and stores the data to be read by a destination in a second clock domain, wherein the buffer functions in both the first clock domain and the second clock domain; a write pointer that points to data written by the source; and a read pointer that points to data read by the destination. According to the system and method disclosed herein, the write pointer and the read pointer are utilized to enable the data to be transmitted from the first clock domain to the second clock domain asynchronously.