Asynchronous Down Counter With Redundant Borrowing Cells

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Solution Overview

Problem

Existing loadable down counter implementations are slower, use more area, and consume more power compared to other implementations, such as handshake circuits.

Innovation Solution

An asynchronous loadable down counter is designed using an array of cells with redundant base-k representation, where each cell includes a finite state machine for state transitions and a GasP module, allowing asynchronous borrowing between cells, and employing state encoding techniques that use fewer state wires to improve performance and reduce power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If asynchronous implementation with handshake circuits is used, then the down counter can be implemented, but it is slower, uses greater area, and consumes more power

Engineering Contradiction:
Improvedecrement operation speedVSAvoidcircuit area
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The down counter is divided into multiple independent cells, each handling a single digit in base-k representation. Each cell contains its own finite state machine and borrowing logic, allowing parallel operation and eliminating the need for sequential handshake circuits across the entire counter.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The circuit uses dynamic signaling with rising and falling edges to indicate borrow requests and acknowledgments. State transitions are driven by dynamic signals rather than static handshake protocols, enabling faster operation through edge-triggered state changes.

Inventive Principle:
Principle #15Dynamics

2Loss of time

If synchronous implementation is used, then the down counter can be implemented, but it requires waiting for rippling sequence completion before borrowing

Engineering Contradiction:
Improvewait time for borrow operationVSAvoiddecrement operation throughput
Core Design Contradiction:
Loss of timeVSProductivity

Solution Approach 1:

Each cell is pre-configured with borrowing logic that can immediately respond to borrow requests without waiting for synchronous clock edges. The finite state machines in each cell are ready to execute borrow operations as soon as the condition is met, eliminating synchronization delays.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The borrowing mechanism uses dynamic asynchronous signaling where cells can immediately request and acknowledge borrows through rising/falling edges without waiting for ripple propagation or clock synchronization, dramatically reducing wait time.

Inventive Principle:
Principle #15Dynamics

3Productivity

If redundant base-k representation is used, then asynchronous borrowing can be implemented, but state encoding requires careful design

Engineering Contradiction:
Improveasynchronous operation capabilityVSAvoidstate encoding complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The system uses redundant base-k representation where each digit can take values from 0 to k-1, with k>2. This parameter change allows multiple valid representations of the same number, enabling flexible borrowing operations without complex state encoding. The redundant representation simplifies the borrowing logic by allowing direct manipulation of digit values.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20110243295A1Asynchronous loadable down counter
Publication Date: 2011.10.06 ORACLE INT CORP
  • US20110243295A1 patent drawing
  • US20110243295A1 patent drawing
  • US20110243295A1 patent drawing

AI summary

The disclosed embodiments relate to an asynchronous down counter, which can be loaded with any value N and then decrement exactly N times. The counter comprises an array of cells, wherein each cell is configured to hold a digit in a redundant base-k representation of a number contained in the array of cells. Each cell further comprises a finite state machine that defines state transitions between states, where these states are held on wires and state transitions are synchronized between neighboring cells. Each cell is further configured to asynchronously borrow, if possible, from a more significant adjacent cell to increase a value of a digit in the cell. This asynchronous borrowing improves performance by ensuring that a decrement operation, which decrements a digit in a least significant cell in the array, will borrow from an adjacent more significant cell, without having to wait for the completion of a rippling sequence of borrows from more significant cells.