Asynchronous Eigenvalue Task Scheduling for Tridiagonalization Bottlenecks
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Solution Overview
Problem
The calculation of the standard eigenvalue problem for a symmetric matrix is bottlenecked by the tridiagonalization process in DSYTRD, which has low cache efficiency and reduces parallelism, hindering performance improvements in modern processors with increased core counts.
Innovation Solution
The processor divides the calculation into units based on dependency analysis, executing tasks asynchronously using OpenMP or CUDA Graphs to improve parallelism and cache efficiency, particularly in the tridiagonalization and inverse transformation stages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the standard eigenvalue problem is solved using the divide-and-conquer method with DSYTRD for tridiagonalization, then the calculation can be performed with high parallelism, but the cache efficiency deteriorates and parallelism is reduced during the tridiagonalization process
Solution Approach 1:
The patent segments the tridiagonalization calculation into multiple independent units that can be executed in parallel. By dividing the matrix processing into discrete, non-dependent tasks, the system maintains high parallelism while improving cache efficiency through localized data access patterns in each segment.
Solution Approach 2:
The patent performs preliminary organization of calculation tasks and data before execution. By pre-processing and structuring the tridiagonalization operations, the system prepares data in advance to minimize cache misses and reduce wait times during the actual computation phase.
2Power
If more cores are incorporated into processors to improve calculation performance, then the processing power increases, but the effectiveness is limited by the low parallelism in the tridiagonalization process
Solution Approach 1:
The patent dynamically adjusts the parallelism and task distribution based on the computational stage. During tridiagonalization, it optimizes the degree of parallelism to match the available cores, ensuring that processing power is fully utilized without being constrained by algorithmic limitations.
3Speed
If the tridiagonalization process is optimized for parallel execution, then the calculation speed improves, but the cache efficiency deteriorates due to the access patterns required
Solution Approach 1:
The patent applies different optimization strategies to different parts of the tridiagonalization process. By making each calculation unit self-contained with localized data access, it improves cache efficiency in each segment while maintaining overall parallel execution speed.
Data Source
AI summary
An arithmetic processing device includes processing circuitry. The processing circuitry is configured to asynchronously calculate, for a plurality of units of calculation for performing respective different calculations generated by dividing calculation of a standard eigenvalue problem for a predetermined symmetric matrix, a first task and a second task out of a plurality of tasks in which the respective units of calculation are executed when a dependency in which calculation of one of the first task and the second task is performed based on a result of calculation of the other is not present between the first task and the second task and sequentially calculate the first task and the second task when the dependency is present between the first task and the second task. The processing circuitry is configured to output a result of the calculation of the standard eigenvalue problem for the predetermined symmetric matrix calculated by the calculating.