Asynchronous Image Processing Pipelines for Dynamic Resource Allocation
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Solution Overview
Problem
Current computer processors are limited in their ability to efficiently process diverse and dynamic image processing cycles due to fixed pipeline stages and inadequate utilization of hardware resources, leading to bottlenecks in performance, especially in heavy-duty industrial machine vision applications.
Innovation Solution
A state-managed asynchronous pipelined architecture is implemented, allowing multiple image processing cycles to be executed independently in parallel pipelines, utilizing pre-existing cycle data containers and dynamically adjusting hardware resources to maximize performance and scalability with the number of processor cores.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a fixed pipeline stage configuration is used in computer processors, then the system structure is simple and easy to implement, but the processing capability for diverse and dynamic image processing cycles is limited
Solution Approach 1:
The patent implements dynamic pipeline configuration where the number and structure of pipeline stages can be adjusted based on the specific image processing cycle requirements. Instead of a fixed pipeline, the system dynamically creates and configures pipeline stages to match the processing needs of different image processing tasks, enabling adaptability while managing complexity through structured dynamic allocation.
Solution Approach 2:
The patent segments the image processing workflow into discrete, independently configurable stages that can be arranged in different pipeline configurations. Each processing operation is broken down into modular segments that can be dynamically assembled into pipelines of varying lengths and structures, allowing the system to adapt to diverse processing requirements without requiring a completely different architecture for each task.
2Productivity
If hardware resources are dedicated to specific processing tasks, then processing speed for repeatable cycles is enhanced, but resource utilization efficiency decreases for dynamic and varied workloads
Solution Approach 1:
The patent implements universal hardware resources that can be dynamically allocated to different image processing cycles based on demand. Instead of dedicating specific hardware resources to fixed tasks, the system creates a pool of reusable processing resources that can be assigned to various processing cycles as they are generated, ensuring high utilization efficiency while maintaining fast processing speeds through immediate resource availability.
Solution Approach 2:
The patent pre-allocates and prepares hardware resources in a ready state before processing cycles are fully defined. By maintaining a pool of pre-configured processing resources that can be immediately assigned to incoming processing cycles, the system eliminates resource allocation delays while ensuring that resources are efficiently utilized across multiple cycles without being permanently dedicated to any single task.
3Productivity
If multiple image processing cycles are executed in parallel pipelines, then processing throughput is significantly enhanced, but system complexity and coordination overhead increase
Solution Approach 1:
The patent segments parallel processing into independent, self-contained pipelines that each handle specific image processing cycles. By dividing the overall processing workload into discrete pipeline segments with clearly defined inputs and outputs, the system achieves high throughput through parallel execution while reducing coordination complexity through modular isolation of processing tasks.
Solution Approach 2:
The patent introduces an intermediary layer that manages the coordination between multiple parallel pipelines. This intermediary component handles resource allocation, cycle assignment, and synchronization between pipelines, allowing the system to execute multiple processing cycles in parallel with enhanced throughput while the intermediary absorbs and manages the coordination overhead, preventing it from becoming a bottleneck.
4Adaptability or versatility
If a single configuration is applied to drive runtime execution, then system operation is simple and consistent, but flexibility to adapt to different processing requirements is reduced
Solution Approach 1:
The patent implements dynamic configuration generation where processing configurations are created and adjusted at runtime based on the specific requirements of each image processing cycle. Instead of using a single static configuration, the system dynamically generates appropriate pipeline structures and parameter settings for each processing task, providing flexibility while maintaining operational simplicity through automated configuration generation rather than manual setup.
Data Source
AI summary
This application is directed to information visualization for image processing. An electronic system implements a plurality of image processing cycles associated with a temporal sequence of triggers, and each image processing cycle is created in response to one or more respective trigger events. The electronic system obtains a plurality of input/output (I/O) signals of the plurality of image processing cycles and generates a plurality of cycle status signals. Each cycle status signal is associated with a sequence of time stamps and indicates progress of a respective image processing cycle based on the I/O signals. The sequence of time stamps has a temporal resolution that is higher than a predefined resolution. Dynamically and in real time, while implementing the image processing cycles, the electronic system visualizes the plurality of cycle status signals concurrently with respect to at least a first temporal axis on a user interface.