Asynchronous Kernel Message Scheduling for Processor IPC Optimization

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Solution Overview

Problem

Traditional operating systems face inefficiencies in scheduling code sequences for execution on processors, often relying on synchronous methods that can lead to performance bottlenecks and increased power consumption, especially when using high IPC processors.

Innovation Solution

An asynchronous kernel that assigns code sequences to execute on various processors, allowing them to queue messages and continue executing without waiting for responses, with the kernel periodically processing these messages to schedule targeted code sequences for execution, optimizing performance by leveraging processors with different IPC designs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If synchronous scheduling methods are used in traditional operating systems, then code sequences can be scheduled for execution on processors, but performance bottlenecks occur and power consumption increases

Engineering Contradiction:
Improvesystem performanceVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

The patent applies preliminary action by allowing code sequences to pre-queue messages to other code sequences without waiting for execution or response. The sending code sequence continues executing and queuing messages in advance, while the kernel asynchronously processes these messages later to schedule targeted code sequences, eliminating the need to wait for synchronous responses.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements continuity of useful action by enabling code sequences to continue executing and queuing messages continuously without being blocked by synchronous communication. The asynchronous message processing allows the system to maintain continuous execution flow, with the kernel periodically reading and processing queued messages to schedule code sequences without interrupting the sending code's execution.

Inventive Principle:
Principle #20Continuity of useful action

2Speed

If high IPC processors are used to execute code sequences, then execution speed increases, but power consumption increases significantly

Engineering Contradiction:
Improveexecution speedVSAvoidprocessor power consumption
Core Design Contradiction:
SpeedVSUse of energy by stationary object

Solution Approach 1:

The patent applies dynamics by dynamically assigning code sequences to different processors based on their IPC characteristics and the nature of the code. The kernel can schedule code sequences on high IPC processors when execution speed is critical, and on low IPC processors for less time-sensitive tasks, optimizing the balance between performance and power consumption based on real-time system conditions.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent implements local quality by matching specific code sequences with appropriate processors based on their requirements. High IPC processors are allocated to code sequences that benefit from their superior execution speed, while low IPC processors handle code sequences that are less performance-critical or can tolerate longer execution times, creating an optimized local distribution of computational tasks.

Inventive Principle:
Principle #3Local quality

3Reliability

If synchronous message sending is implemented, then code sequences can communicate with each other, but the sending code must wait for responses causing execution delays

Engineering Contradiction:
Improvecode communication reliabilityVSAvoidexecution delay
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent uses the kernel as an intermediary to facilitate asynchronous communication between code sequences. Instead of direct synchronous communication where the sender waits for a response, the sender queues a message with the kernel, which then asynchronously processes the message and schedules the targeted code sequence for execution, eliminating the waiting delay while maintaining communication reliability through kernel-managed message handling.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS11392409B2Asynchronous kernel
Publication Date: 2022.07.19 APPLE INC
  • US11392409B2 patent drawing
  • US11392409B2 patent drawing
  • US11392409B2 patent drawing

AI summary

In an embodiment, an operating system for a computer system includes a kernel that assigns code sequences to execute on various processors. The kernel itself may execute on a processor as well. Specifically, in one embodiment, the kernel may execute on a processor with a relatively low instructions per clock (IPC) design. At least a portion of other processors in the system may have higher IPC designs, and processors with higher IPC designs may be used to execute some of the code sequences. A given code sequence executing on a processor may queue multiple messages to other code sequences, which the kernel may asynchronously read and schedule the targeted code sequences for execution in response to the messages. Rather than synchronously preparing a message and making a call to send the message, the executing code sequences may continue executing and queuing messages until the code has completed or is in need of a result from one of the messages.