Asynchronous Program and Erase Control for Two-Terminal Memory Devices
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Solution Overview
Problem
Current two-terminal memory devices face inefficiencies in bulk program or erase operations due to variations in completion times among multiple memory cells, leading to delays and increased operation times.
Innovation Solution
Implementing asynchronous program or erase operations by initiating operations on multiple two-terminal memory devices simultaneously and progressing to subsequent devices independently, while reducing verification cycles and using biasing currents to quickly detect state changes, thereby facilitating faster and concurrent memory operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If bulk program or erase operations are performed on multiple two-terminal memory devices simultaneously, then productivity is improved, but operation time increases due to variations in completion times among memory cells
Solution Approach 1:
The memory array is divided into multiple independently controllable blocks or groups of memory cells. Each block can undergo program or erase operations independently and simultaneously, allowing parallel processing without interference between blocks, thus improving overall productivity while managing operation time effectively
Solution Approach 2:
The system dynamically adjusts the timing and control of program/erase operations across different memory blocks based on their individual completion statuses. Faster blocks can proceed to next operations while slower blocks continue, optimizing the overall process time rather than waiting for all blocks to complete uniformly
2Loss of time
If verification cycles are reduced for faster detection, then operation time is reduced, but measurement precision may deteriorate
Solution Approach 1:
Instead of performing complete verification cycles on all memory cells, the system performs partial verification on a representative subset of cells to detect state changes. This partial action approach provides sufficient precision for controlling the program/erase operations while significantly reducing the time consumed by verification processes
Data Source
AI summary
A method for facilitating erase or program operations on two-terminal memory devices includes substantially simultaneously initiating erase cycle or program cycle for two-terminal memory devices from a first plurality of two-terminal memory devices, monitoring erase detect or program detect conditions for each of the two-terminal memory devices, and before detecting erase detect or program detect conditions for all of the two-terminal memory devices, the method includes detecting an erase detect or a program detect condition for the first two-terminal memory device from the first plurality of two-terminal memory devices, and initiating an erase cycle or a program for a second two-terminal memory device for a second plurality of two-terminal memory devices, in response to detecting the erase detect or program detect condition for the first two-terminal memory device.