Asynchronous Memory Access via Dynamic Query Periods
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Solution Overview
Problem
Conventional synchronous DDR protocols are inadequate for hybrid memory systems with different access latencies, requiring additional signaling and increased bus bandwidth to transmit latency identifiers and other information, which complicates memory access and reduces efficiency.
Innovation Solution
A system and method for asynchronous memory access that dynamically adjusts the query period based on the busy degree of the interconnection channel between the memory controller and the memory device, using a query request to determine data availability without additional signal cables, and implementing access using read instructions for compatibility with various storage protocols.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If asynchronous access protocol is used to accommodate different memory media with varying access latencies, then adaptability to different memory media is improved, but device complexity increases due to additional signaling requirements
Solution Approach 1:
The patent combines the data transmission channel and the status notification function into a single unified protocol. The memory device embeds ready status information within existing data transfer packets, eliminating the need for separate status signaling channels. This merging approach maintains adaptability to different memory media while reducing protocol complexity by removing redundant signaling mechanisms.
Solution Approach 2:
The patent designs a universal data transfer packet structure that can carry both data payloads and status information (such as ready status, error status, and metadata) in a standardized format. This multi-functional packet structure allows the same communication channel to handle various memory media types with different access latencies without requiring media-specific protocols, thus reducing overall system complexity while maintaining broad adaptability.
2Adaptability or versatility
If additional information such as latency identifier, access granularity, and request identifier is transmitted to support asynchronous access, then adaptability to different memory media is improved, but bus bandwidth consumption increases
Solution Approach 1:
The patent merges status information (ready status, latency identifiers, access granularity) with data payloads within the same transmission packets. Instead of sending separate control messages for each piece of information, the system embeds multiple pieces of metadata in compact fields within the data transfer packets themselves, reducing the total volume of transmitted information while maintaining full asynchronous access capability.
Solution Approach 2:
The patent employs variable-length field encoding and dynamic parameter compression where commonly used values are represented more efficiently. By analyzing actual usage patterns of latency identifiers and access granularity parameters, the system optimizes their representation to consume fewer bits on average, thereby reducing bus bandwidth consumption while preserving the ability to support diverse memory media with varying characteristics.
3Device complexity
If fixed read/write latency is used in synchronous DDR protocol, then device complexity is reduced, but adaptability to different memory media deteriorates
Solution Approach 1:
The patent introduces dynamic latency handling into an otherwise simple protocol structure. The system determines access latency on-demand based on the specific memory media being accessed and the current system state, then adjusts timing parameters dynamically without requiring a completely different protocol for each media type. This dynamic approach maintains protocol simplicity while achieving adaptability to hybrid memory systems with varying access characteristics.
Solution Approach 2:
The patent implements variable timing parameters within a unified protocol framework. Instead of using fixed latency values, the system allows read/write latency parameters to be adjusted based on the memory media type and access conditions. This parameter flexibility enables the same simple protocol to work across different memory technologies (DRAM, NAND flash, NOR flash, etc.) with inherently different access speeds, resolving the contradiction between protocol simplicity and media adaptability.
Data Source
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AI summary
Embodiments of the present invention provide a method, an apparatus, and a system for accessing a memory device, to implement asynchronous access to a memory device. The system includes a memory controller and a memory device, and the memory device includes a medium controller, a memory, and a buffer. The medium controller is configured to write, into the buffer based on each received access request of the memory controller, data that is requested by each access request and that is stored in the memory. The memory controller is configured to: after sending at least one access request to the medium controller, send a query request to the medium controller, where the query request is used to query whether data has been written into the buffer. The medium controller is further configured to: determine, based on the query request, whether data has been written into the buffer, and if it is determined that data has been written into the buffer, send the data that has been written into the buffer to the memory controller.