Asynchronous Multi-Core Processor Task Division and Scheduling
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Solution Overview
Problem
Modern multiple-core processors face challenges in compatibility and efficiency, particularly with software applications not functioning properly across different core configurations, and existing LAPACK/BLAS implementations being power inefficient on single-core processors.
Innovation Solution
An asynchronous multiple-core processor with self-timed core processors linked by a network bus, a task divider, and a sub-task scheduler/dispatcher, which divides tasks into sub-tasks, schedules their execution, and broadcasts instruction streams to optimize power efficiency by eliminating the need for a global clock tree.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If multiple-core processors are used to reduce size and power consumption, then power efficiency is improved, but compatibility and ease of operation deteriorate due to low compatibility between different core configurations
Solution Approach 1:
The system segments a software task into multiple sub-tasks that can be executed in parallel across multiple core processors. The task divider divides the original task into smaller sub-tasks, which are then distributed to different cores, allowing the software to run on various core configurations without modification.
Solution Approach 2:
The patent introduces intermediary components including a task divider, sub-task scheduler, and software library that act as mediators between the software application and the multiple-core processor. These intermediaries handle the complexity of parallel execution and core management, shielding the software from hardware-specific details and improving compatibility.
2Reliability
If a global clock tree is used in traditional processors, then synchronization is simplified, but power consumption increases and heat generation worsens
Solution Approach 1:
The patent extracts and eliminates the global clock tree from the processor architecture. Instead of using a centralized clock distribution system, each core processor operates asynchronously with its own local timing mechanisms, removing the power-consuming and heat-generating global clock infrastructure while maintaining synchronization through alternative means.
Solution Approach 2:
Each core processor is self-timed and operates autonomously without relying on a global clock signal. The cores independently manage their own execution timing and synchronize through message passing and shared memory mechanisms, making the system self-sufficient and eliminating the need for power-intensive global clock distribution.
3Ease of manufacture
If tasks are executed sequentially on a single-core processor, then software implementation is simpler, but power efficiency deteriorates
Solution Approach 1:
The system dynamically adapts the degree of parallelization based on the task characteristics and available core resources. The task divider and scheduler automatically determine the optimal number of sub-tasks and their distribution across cores, providing dynamic power efficiency improvements without requiring complex software modifications from developers.
Data Source
AI summary
An asynchronous multiple-core processor may be adapted for carrying out sets of known tasks, such as the tasks in the LAPACK and BLAS packages. Conveniently, the known tasks may be handled by the asynchronous multiple-core processor in a manner that may be considered to be more power efficient than carrying out the same known tasks on a single-core processor. Indeed, some of the power savings are realized through the use of token-based single core processors. Use of such token-based single core processors may be considered to be power efficient due to the lack of a global clock tree.