Hardware Asynchronous Logging for Persistent Memory Latency

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Solution Overview

Problem

Existing hardware logging solutions for persistent memory incur high latency due to synchronous commit of atomic regions, leading to inefficiencies in memory operations and increased complexity in managing logs.

Innovation Solution

Implementing hardware-based asynchronous logging that allows for asynchronous commit of atomic regions using a modified cache line list and memory controller to track dependencies, enabling asynchronous log persist operations and data persist operations without waiting for their completion.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If synchronous persist operations are used to commit atomic regions, then data consistency is guaranteed, but memory operation latency increases

Engineering Contradiction:
Improvedata consistencyVSAvoidmemory operation latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent performs log persist operations (LPOs) in advance before data persist operations (DPOs) are needed. By logging old data values to persistent memory beforehand, the system prepares recovery information proactively, allowing DPOs to be executed asynchronously without blocking atomic region commits, thus reducing memory operation latency while maintaining data consistency through the pre-established log.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent dynamically adjusts the commit timing of atomic regions by decoupling the commit decision from the completion of persist operations. The memory controller tracks dependencies between atomic regions and allows regions to commit as soon as their dependencies are satisfied, rather than waiting for all persist operations to complete. This dynamic approach reduces latency while preserving consistency through dependency tracking.

Inventive Principle:
Principle #15Dynamics

2Productivity

If hardware-assisted logging is implemented, then logging efficiency is improved, but system complexity increases

Engineering Contradiction:
Improvelogging efficiencyVSAvoidsystem complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent makes the memory controller universal by giving it multiple functions: it manages persistent memory operations, tracks dependencies between atomic regions, coordinates asynchronous LPOs and DPOs, and handles commit decisions. By consolidating these functions in the existing memory controller rather than adding separate hardware components, the system achieves high logging efficiency while minimizing the increase in system complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The hardware logging system operates autonomously without requiring software intervention. The memory controller automatically initiates LPOs, tracks dependencies between atomic regions, coordinates DPOs, and manages commit timing based on dependency satisfaction. This self-service approach improves logging efficiency by eliminating software overhead while keeping system complexity manageable through automated hardware-based dependency tracking.

Inventive Principle:
Principle #25Self-service

3Productivity

If asynchronous log persist operations are performed, then memory throughput is improved, but dependency management complexity increases

Engineering Contradiction:
Improvememory throughputVSAvoiddependency management complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent introduces a dependency table as an intermediary data structure that mediates between asynchronous LPOs/DPOs and atomic region commits. The memory controller uses this table to track which atomic regions depend on which data entries, allowing it to manage the complexity of asynchronous operations systematically. This intermediary structure enables high memory throughput by allowing parallel async operations while keeping dependency management organized and tractable.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12050810B2Systems and methods for hardware-based asynchronous persistence
Publication Date: 2024.07.30 THE BOARD OF TRUSTEES OF THE UNIV OF ILLINOIS
  • US12050810B2 patent drawing
  • US12050810B2 patent drawing
  • US12050810B2 patent drawing

AI summary

Systems and methods for hardware-based asynchronous logging include: initiating first and second atomic regions on first and second cores of a central processing unit (CPU); and asynchronously logging data for the first atomic region and the second atomic region using the CPU by: asynchronously performing log persist operations (LPOs) to log an old data value from each atomic region; updating the old data value to a new data value from each atomic region; tracking dependencies between the first atomic region and the second atomic region using a memory controller; asynchronously performing data persist operations (DPOs) to persist the new data value for each atomic region; and committing the first atomic region and the second atomic region based on the dependencies using the memory controller of the CPU.