Asynchronous Pixel Streaming Over I/O Links for Display Bandwidth
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Solution Overview
Problem
Existing display pixel data transmission protocols, such as DisplayPort (DP) and embedded DisplayPort (eDP), require tight timing synchronization, leading to inefficient bandwidth utilization and increased power consumption due to idle time, and necessitate additional cabling.
Innovation Solution
Implementing a peer-to-peer, asynchronous display pixel data streaming protocol that relaxes timing constraints, allowing data to be streamed as fast as the I/O bus can accept it, using message-based communication over protocols like PCIe, CXL, or USB, eliminating the need for pixel-synchronous requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If synchronous protocols (DisplayPort, eDP) are used for pixel data transmission, then timing synchronization is achieved, but bandwidth utilization efficiency deteriorates due to idle time
Solution Approach 1:
The patent inverts the traditional synchronous approach by implementing an asynchronous protocol where pixel data is transmitted without strict timing constraints. Instead of forcing the receiver to match the sender's timing, the system allows the receiver to process data at its own pace, eliminating idle time and improving bandwidth utilization while maintaining display reliability through buffer management and flow control mechanisms.
Solution Approach 2:
The patent introduces dynamic adaptability in the data transmission system by allowing variable timing between pixel data transmission and processing. The asynchronous protocol enables the system to dynamically adjust to different processing speeds and bandwidth conditions, optimizing utilization efficiency while maintaining synchronization through software-based coordination rather than rigid hardware timing.
2Reliability
If synchronous protocols are used for pixel data transmission, then timing control is maintained, but power consumption increases due to idle time
Solution Approach 1:
The patent eliminates the need for continuous timing control signals by inverting to an asynchronous model. The display controller processes pixel data as it arrives without being forced to maintain idle states for synchronization, significantly reducing power consumption while preserving timing control through event-driven processing and buffer management.
Solution Approach 2:
The patent implements periodic data transmission bursts followed by idle periods only when necessary, rather than maintaining continuous periodic synchronization signals. This allows the system to enter low-power states during natural pauses in data transmission while maintaining timing control through periodic refresh cycles and buffer refilling operations.
3Reliability
If pixel-synchronous protocols are used, then data transmission is coordinated, but additional cabling is required
Solution Approach 1:
The patent makes existing I/O interfaces (PCIe, USB, CXL) multi-functional by enabling them to carry pixel data without dedicated display interfaces. The asynchronous protocol allows these universal interfaces to handle both traditional I/O operations and display data transmission, eliminating the need for separate DisplayPort or eDP cabling while maintaining coordinated data transmission through protocol-level synchronization.
Solution Approach 2:
The patent merges display data transmission with existing I/O communication channels. By combining pixel data streams with general-purpose data buses using asynchronous protocols, the system consolidates multiple functions into single cabling infrastructures, reducing physical complexity while preserving transmission coordination through software-based protocol management.
Data Source
AI summary
In one embodiment, a system includes a display source to generate pixel data for a frame to be displayed, generate a display update notification message comprising information about the pixel data, and generate a display data message comprising the pixel data. The system also includes translation circuitry to generate one or more first packets comprising the information in the display update notification message and formatted according to an input/output (I/O) protocol based on the display update notification message, and generate one or more second packets comprising the pixel data and formatted according to the I/O protocol based on the display data message. The system further includes input/output circuitry to transmit the first and second data packets across a link based on the I/O protocol.