Asynchronous Persistent Memory Mirroring via RDMA Offload

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Solution Overview

Problem

Current methods for protecting data against uncorrectable errors in Persistent Memory systems rely heavily on CPU resources, leading to increased workload and inefficiency, as there is no optimized method to reduce CPU consumption while ensuring data mirroring for error protection.

Innovation Solution

Implementing asynchronous Persistent Memory access interfaces using RDMA Loopback or Intel DSA technology to perform data mirroring, offloading CPU-intensive operations to specialized hardware like RDMA or DSA engines, which handle async write operations independently of the CPU.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If CPU-based data mirroring is used to protect Persistent Memory against uncorrectable errors, then data reliability is improved, but CPU workload increases

Engineering Contradiction:
Improvedata protectionVSAvoidCPU workload
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent introduces a supplemental device (RDMA engine or DSA engine) as an intermediary between the CPU and Persistent Memory. This mediator handles the data mirroring operations independently, allowing the CPU to focus on primary processing tasks while the supplemental device ensures data reliability through asynchronous mirroring operations.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent replaces the traditional CPU-based mechanical data copying mechanism with specialized hardware engines (RDMA or DSA). These hardware-based systems perform mirroring operations more efficiently, substituting the general-purpose CPU processing with dedicated hardware acceleration that reduces overall system workload.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Reliability

If CPU-based data mirroring is implemented, then data availability is improved, but processing speed deteriorates

Engineering Contradiction:
Improvedata availabilityVSAvoidprocessing speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The patent implements asynchronous mirroring where the supplemental device performs data copying operations in advance and independently of the main CPU processing flow. The mirroring occurs as a preliminary background operation that does not block or slow down the primary data processing path, thus maintaining high processing speed while ensuring data availability.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The supplemental device continuously performs mirroring operations in the background without interrupting the main CPU processing stream. This continuous background operation ensures that data protection is maintained at all times while the primary system operates at full speed without interruptions.

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS12067259B2Asynchronous persistent memory data mirroring
Publication Date: 2024.08.20 DELL PROD LP
  • US12067259B2 patent drawing
  • US12067259B2 patent drawing
  • US12067259B2 patent drawing

AI summary

Disclosed is a method for preforming the data mirror comprising: receiving from an application executing on a computing device a request to write data to a first local persistence memory of the computing device; issuing an async write operation to mirror the write request to write a same data to a second local persistence memory of the computing device; performing a write operation to write the data to the first local persistence memory by using a central processing unit (CPU) from the processing resource of the computing device; determining, by an additional CPU, a status completion result indicating whether the async write operation is complete; and in response to determining the async write operation is complete, determining, by the additional CPU, a status check result indicating whether the async write operation is successful.