Asynchronous Power Controller for IC Domain Isolation
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Solution Overview
Problem
Power control in integrated circuits (ICs) is complex, particularly in managing power transitions between retention and accessible areas, and applying power to different parts of ICs, known as power domains, which poses challenges in timing and efficiency.
Innovation Solution
The development of an asynchronous power controller that receives sleep and awaken commands, along with status signals, to manage power domain transitions without relying on clock signals, using combinational logic to generate power domain commands and control power switches, ensuring reliable isolation and retention.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If clock-synchronized power control is used, then timing coordination is simplified, but power transition speed is limited by clock frequency and electromagnetic interference increases
Solution Approach 1:
The patent extracts the clock synchronization requirement from the power control system, creating an asynchronous power controller that operates independently of the system clock. This allows power transitions to occur at any time without waiting for clock edges, significantly increasing power transition speed while eliminating clock-related electromagnetic interference and reducing chip real-estate usage for clock distribution networks
Solution Approach 2:
The patent implements preliminary actions by using isolation cells to isolate retention areas from the rest of the circuit before power is removed, and by using retention cells to preserve data in a stable state before power transitions occur. This ensures data integrity during asynchronous power transitions without requiring clock synchronization
2Loss of energy
If fine-grain power domain control is implemented, then power efficiency is improved, but control complexity and timing challenges increase
Solution Approach 1:
The patent divides the IC into multiple independent power domains, each with its own asynchronous power controller, isolation cells, and retention cells. This segmentation allows each domain to be controlled independently for fine-grain power management, improving power efficiency by allowing individual domains to be powered down when not in use while maintaining simple control logic within each domain
Solution Approach 2:
The patent introduces isolation cells as intermediary elements between power domains and the rest of the circuit. These isolation cells act as mediators that can disconnect a power domain from the rest of the system, simplifying the control complexity by providing a clear boundary and isolation mechanism without requiring complex timing coordination across the entire system
3Reliability
If retention area isolation is implemented before power removal, then data integrity is maintained, but control sequencing complexity increases
Solution Approach 1:
The patent implements preliminary isolation by using isolation cells to disconnect retention areas from the rest of the circuit before power is removed. This preliminary action ensures that retained data is isolated and protected from external interference or corruption during the power transition, maintaining data integrity without requiring complex control sequencing
Solution Approach 2:
The patent employs self-service mechanisms where retention cells automatically maintain their data state through their inherent retention functionality, and isolation cells automatically disconnect when control signals are applied. This reduces control sequencing complexity by relying on the self-service nature of these specialized cells rather than requiring complex external control logic
Data Source
AI summary
An apparatus, system and method for asynchronously reducing power in a power domain. In one embodiment, the method includes: (1) receiving a sleep command for the power domain, (2) receiving, upon receiving the sleep command, an affirmative retention status signal denoting that a retention area in the power domain has stored data, (3) receiving, upon receiving the sleep command, an affirmative isolation status signal that denotes that an isolation of the power domain has occurred and (4) providing a power domain off command to the power domain upon receiving at least the sleep command, the affirmative status retention signal and the affirmative status isolation signal. In another embodiment, multiple enable signals are employed to generate a “glitch-free” control for a power switch.