Asynchronous Pulse Width Discrimination Without PLL Demodulation
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Solution Overview
Problem
Existing asynchronous serial data modulation schemes rely on complex phase-locked loops (PLLs) and fixed-frequency filters, making them unsuitable for frequency-agile designs and limiting their ability to demodulate data streams across a broad frequency range without a synchronous clock.
Innovation Solution
A method that measures incoming transition widths by counting asynchronous clock pulses, derives a reference from the shortest validated width, and uses this reference to compare and discriminate further pulse widths, eliminating the need for a synchronous clock and simplifying the demodulation process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If phase-locked loops and fixed-frequency filters are used for demodulation, then demodulation robustness is improved, but device complexity and cost increase
Solution Approach 1:
The patent extracts the clock signal directly from the incoming data stream transitions without using a separate phase-locked loop circuit. By measuring transition widths directly and comparing them to a reference width, the system achieves robust demodulation while eliminating the complexity of PLL circuits and fixed-frequency filters.
Solution Approach 2:
The system uses the incoming data stream itself to generate the reference clock signal through transition width measurement. The demodulator serves itself by deriving timing information from the data being processed, eliminating the need for external synchronous clocks or complex synchronization circuits.
2Measurement precision
If phase-locked loops with fixed-frequency filters are used, then phase locking accuracy is improved, but bandwidth and frequency agility are reduced
Solution Approach 1:
The patent implements a dynamic reference width adjustment mechanism where the reference transition width is continuously updated based on measured transition widths from the incoming data stream. This allows the system to adapt to different frequencies and data rates automatically, providing frequency agility while maintaining accurate transition discrimination through continuous reference updates.
Solution Approach 2:
The system changes the reference transition width parameter dynamically based on the incoming data characteristics. By measuring actual transition widths and updating the reference accordingly, the system maintains accurate discrimination across a broad frequency range without requiring fixed-frequency filters or complex phase locking to external clocks.
3Measurement precision
If synchronous clock extraction is used for demodulation, then demodulation accuracy is improved, but additional hardware and cost are required
Solution Approach 1:
The patent extracts the clock signal directly from the incoming data stream transitions by measuring transition widths, eliminating the need for separate synchronous clock extraction hardware. The transition width measurements serve as the timing reference, removing the need for additional PLL circuits and associated components.
Solution Approach 2:
The transition width measurement circuit serves multiple functions simultaneously: it provides timing information for demodulation, generates the reference clock signal, and enables frequency adaptation. This multi-functional approach eliminates the need for separate synchronous clock extraction hardware while maintaining demodulation accuracy.
Data Source
AI summary
A system and method are directed to measuring incoming transition widths by counting asynchronous clock pulses, deriving a reference shortest validated width, and using the shortest validated width for comparison in discriminating further incoming pulse widths.