Asynchronous Router Virtual Channel Credit Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Asynchronous circuits offer advantages over synchronous circuits in terms of performance, power consumption, and scalability, but they face challenges in achieving desired power and timing characteristics, especially in complex network-on-chip (NoC) applications, where routing packets efficiently and effectively is crucial.
Innovation Solution
An asynchronous router with virtual channel control is implemented, featuring multiple input and output ports, data demultiplexer and merge units, latch control, mutual exclusion elements, and full detector units to manage packet flow and credits, ensuring efficient data transfer and preventing buffer overflow.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If synchronous circuits are used for NoC applications, then timing synchronization is achieved through global clocks, but power consumption increases and scalability is limited
Solution Approach 1:
The patent removes the global clock signal from the NoC system, extracting the timing synchronization mechanism from each router and replacing it with asynchronous handshaking protocols. This eliminates the need for continuous clock distribution while maintaining reliable packet routing through event-driven timing control.
Solution Approach 2:
The patent segments the centralized clock synchronization into distributed local timing control at each router node. Each router independently manages its own timing through asynchronous protocols, allowing scalable deployment without the power overhead of global clock distribution networks.
2Reliability
If synchronous circuits are used for NoC applications, then global timing control is maintained, but device complexity increases and scalability is reduced
Solution Approach 1:
The patent divides the monolithic clock control system into independent modular router units, each capable of autonomous timing management. This segmentation reduces inter-router complexity and enables scalable deployment as each node operates independently without requiring complex global synchronization infrastructure.
3Productivity
If multiple virtual channels are implemented for packet routing, then packet routing efficiency is improved, but buffer management complexity increases
Solution Approach 1:
The patent implements self-service buffer management where each virtual channel buffer autonomously generates credit signals to indicate available capacity. The credit-based flow control mechanism allows buffers to self-regulate their own management without centralized control, reducing management complexity while maintaining efficient multi-channel packet routing.
4Reliability
If credit-based flow control is implemented to prevent buffer overflow, then data transfer reliability is improved, but communication overhead increases
Solution Approach 1:
The patent uses credit signals to perform preliminary action by pre-negotiating buffer availability before data transfer. This advance reservation of buffer space through credit-based flow control prevents overflow conditions before they occur, ensuring reliable data transfer while minimizing the need for corrective actions and retransmissions that would increase overhead.
Data Source
AI summary
Systems, apparatuses, and methods for implementing an asynchronous router with virtual channel (VC) control. The asynchronous router may support multiple VCs for connections to other routers. The asynchronous router may include an interface unit on each switch boundary, with each interface unit including a data merge unit. The data merge unit may include a full detector unit for each VC, with the full detector unit counting the number of flits sent out on a respective VC and counting the number of credits released by the successor router. Whenever the successor router has no credits available, the full detector unit will assert the full signal to prevent any input requests from requesting to transmit over that particular VC. When the full signal is asserted, a timer unit may be activated to repeatedly check if any credits have been released in the successor router.