Asynchronous Sample Rate Conversion With Unified Filter Buffer
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Solution Overview
Problem
Existing data conversion methods in networks experience significant latency due to the need for large input buffers and separate components for synchronisation signal reconstruction, which is problematic for real-time applications like live audio and video transmission.
Innovation Solution
A method and device using a combined input and filter buffer where data packets are processed through low-pass filtering on a position-by-position, data-driven basis, eliminating the need for a separate input buffer and synchronisation signal reconstruction, thereby reducing latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a large input buffer is used to buffer and sort incoming packets, then data conversion can be performed, but latency increases significantly
Solution Approach 1:
The patent combines the input buffer and filter buffer into a single unified buffer structure. This merging eliminates the need for separate buffering stages, allowing data to be processed directly upon arrival without being held in a dedicated input buffer, thereby reducing latency while maintaining conversion capability
Solution Approach 2:
The unified buffer serves multiple functions simultaneously: it acts as both the input buffer for receiving packets and the filter buffer for processing data. This multi-functionality eliminates the need for separate components, reducing overall system latency while maintaining reliable data conversion
2Reliability
If a separate synchronisation signal reconstruction unit is added, then sample rate conversion can be achieved, but device complexity increases
Solution Approach 1:
The patent integrates the synchronisation signal reconstruction functionality directly into the filter buffer processing stage. Instead of using a separate reconstruction unit, the filter buffer simultaneously performs data filtering and synchronisation signal reconstruction, thereby reducing device complexity while maintaining conversion accuracy
Solution Approach 2:
The filter buffer is designed to perform multiple functions: data filtering, packet sorting, and synchronisation signal reconstruction. This multi-functional design eliminates the need for separate dedicated components, reducing overall system complexity while maintaining reliable sample rate conversion
3Manufacturing precision
If data is temporarily stored in both input buffer and SRC, then conversion processing can be optimized, but processing time and latency increase
Solution Approach 1:
The patent merges the input buffer and filter buffer into a single unified buffer, eliminating the need for duplicate data storage. Data is stored once in the unified buffer and processed directly, preventing the accumulation of processing time that would occur with multiple separate buffering stages
Solution Approach 2:
The unified buffer is configured to perform preliminary sorting and organization of incoming packets before conversion processing begins. This preliminary action within a single buffer structure prepares data for optimal conversion without requiring additional storage and retrieval cycles, thereby reducing overall processing time
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces latency by allowing data conversion without the need for additional buffering and synchronisation signal reconstruction, improving the efficiency of data conversion in network environments.
Implementation Method 1
The input data are combined based on their relative position in the filter buffer as part of a low-pass filtering process to form output data with a defined second sample rate
Data Source
AI summary
The invention relates to methods for the conversion of data, which comprises at least the following steps. A number of asynchronously incoming data packets (P0, P1 . . . . P4) is received, wherein the data packets (DP) comprise input data (ED) with a first sample rate. The input data (ED) are assigned to positions in a filter buffer (22) based on the first sample rate. The input data (ED) are combined in the filter buffer (22) based on their respective position to form output data (SKD) with a defined second sample rate (SR2) in in course of a low-pass filtering (23). In the process the input data advance in the filter buffer (22) on a position-by-position and data-driven basis. The invention further relates to a conversion device (20) and a system (30) for the transmission of data as well as to the use of a filter buffer (22) in a conversion device (20) for the conversion of sample rates (SR1, SR2).


