Synchronization Analysis for Asynchronous Processor Architectures

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Solution Overview

Problem

Asynchronous processor architectures face challenges with incorrect synchronization instructions leading to broken code conditions such as deadlocks, undefined behavior, and data race conditions, which can result in inefficient execution and limited optimization opportunities.

Innovation Solution

A method and system that analyze synchronized source code for broken code conditions, providing reports and corrective actions to remove inaccuracies and inefficiencies in synchronization instructions, optimizing the code for improved execution on asynchronous processor architectures by detecting mismatches, redundant instructions, and optimizing synchronization control flow.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If synchronization instructions are added to source code for asynchronous processor architecture, then execution correctness is improved, but risk of broken code conditions (deadlock, undefined behavior, data race) increases

Engineering Contradiction:

Improveexecution correctnessVSAvoidbroken code conditions

Core Design Contradiction:

ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The system performs preliminary static analysis of synchronization instructions before code execution to detect potential broken code conditions such as deadlocks, undefined behavior, and data race conditions. This early detection prevents harmful effects from manifesting during runtime execution.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The system implements feedback mechanisms that analyze synchronization instruction patterns and provide real-time or pre-execution feedback about potential correctness issues. This allows the system to identify and report broken code conditions before they cause harmful effects.

Inventive Principle:

Principle #23Feedback

2Reliability

If synchronization instructions are added correctly to source code, then execution correctness is improved, but execution efficiency deteriorates due to increased overhead

Engineering Contradiction:

Improveexecution correctnessVSAvoidexecution efficiency

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The system extracts and analyzes only the critical synchronization instruction components to identify redundancies and optimize them. By taking out unnecessary synchronization overhead while preserving essential correctness guarantees, the system improves execution efficiency without sacrificing reliability.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The system changes parameters of synchronization instructions through optimization transformations, such as adjusting synchronization granularity, modifying barrier placement, or optimizing wait/set event patterns. These parameter changes reduce overhead while maintaining correctness.

Inventive Principle:

Principle #35Parameter changes

3Reliability

If synchronization instructions are added to source code, then execution correctness is improved, but compiler optimization opportunities are limited

Engineering Contradiction:

Improveexecution correctnessVSAvoidcompiler optimization capability

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The system performs preliminary analysis and transformation of synchronization instructions before compiler optimization passes. By preparing the synchronization structure in advance with optimized patterns and reduced overhead, subsequent compiler optimizations can proceed more effectively without being constrained by complex synchronization logic.

Inventive Principle:

Principle #10Preliminary action

4Reliability

If static analysis is performed to detect broken code conditions, then reliability is improved, but analysis time and computational resources increase

Engineering Contradiction:

Improvedetection accuracyVSAvoidanalysis time

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The static analysis process is segmented into multiple phases, each handling specific aspects of synchronization instruction analysis. This segmentation allows the system to perform comprehensive analysis for high reliability while managing computational resources by dividing the complex analysis task into manageable, prioritized segments.

Inventive Principle:

Principle #1Segmentation

Data Source

PatentEP3797355B1Method of deadlock detection and synchronization-aware optimizations on asynchronous processor architectures

Publication Date: 2024.09.25 HUAWEI TECH CO LTD

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AI summary

A method for improving the performance of applications executed within asynchronous processor architectures. In an embodiment, a method for improving execution time of compiled synchronized source code on an asynchronous processor architecture includes receiving, by a processing system, synchronized source code comprising synchronization instructions to synchronize execution of the synchronized source code on different pipelines of the asynchronous processor architecture. The method also includes analyzing, by the processing system, the synchronized source code to determine whether the synchronized source code includes a broken code condition. The method also includes, after determining, by the processing system, that the synchronized source code does not include a broken code condition, outputting an optimized synchronized source code generated by performing a corrective action on the synchronized source code to correct a synchronization inaccuracy, inconsistency, or inefficiency in the synchronized source code.