Asynchronous ADC Rate Control With Dynamic References and TDC
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Solution Overview
Problem
Conventional analog-to-digital converters (ADCs) face high power consumption due to the need for large numbers of devices and high-speed oversampling to achieve desired resolution, leading to inefficiencies in power usage.
Innovation Solution
The proposed ADC configuration includes a comparison circuit with dynamic reference signals generated by DACs, a time-to-digital converter (TDC) for timestamping, and a timer to enable sampling after a predetermined period, allowing for reduced comparator count and adaptive sampling rates, thereby optimizing power usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional synchronous ADC or level-crossing ADC is used to achieve desired resolution, then measurement precision is improved, but power consumption increases due to large number of devices and high-speed oversampling
Solution Approach 1:
The patent implements dynamic reference signal generation where the reference levels are not fixed but are dynamically adjusted based on the input signal characteristics. The reference circuit generates reference signals that adapt to the signal being measured, allowing the system to use fewer comparators while maintaining resolution. This dynamic adaptation enables the system to operate efficiently by only using the necessary number of reference levels at any given time, rather than maintaining a large static set of reference levels throughout operation.
Solution Approach 2:
The patent employs periodic sampling with a timer that enables the ADC at specific intervals rather than continuous high-speed operation. The timer controls when sampling occurs, allowing the system to enter low-power states between sampling events. This periodic operation reduces average power consumption while maintaining the ability to capture signal variations at appropriate rates, eliminating the need for continuous high-speed oversampling.
2Measurement precision
If high-speed oversampling is used to achieve desired resolution, then measurement precision is improved, but productivity decreases due to inefficient power usage
Solution Approach 1:
The patent changes the operational parameters of the ADC by implementing variable sampling rates and dynamic reference signal levels. Instead of fixed high-speed operation, the system adjusts sampling parameters based on signal characteristics and requirements. The reference circuit generates reference signals with varying amplitudes and timing, allowing the system to achieve required resolution with lower average power consumption by adapting parameters to actual measurement needs rather than operating at maximum speed continuously.
3Measurement precision
If large number of comparators is used to achieve desired resolution, then measurement precision is improved, but device complexity increases
Solution Approach 1:
The patent replaces the static architecture with many fixed comparators with a dynamic reference signal generation system. Instead of having multiple comparators simultaneously active, the system uses a time-multiplexed approach where reference signals are dynamically generated and switched. This reduces the number of physical comparator devices needed while maintaining the ability to resolve multiple signal levels through sequential comparison with dynamically adjusted reference levels.
Solution Approach 2:
The reference circuit serves multiple functions: it generates reference signals for comparison, adapts reference levels based on signal characteristics, and controls timing for sampling operations. This multi-functional reference circuit replaces what would otherwise require multiple dedicated comparator circuits, reducing overall device complexity while maintaining measurement precision through its ability to provide appropriate reference levels for different signal conditions.
Data Source
AI summary
An apparatus is provided. A comparison circuit is configured to receive an analog signal. A reference circuit is coupled to the comparison circuit and is configured to provide a plurality of reference signals to the comparison circuit. A conversion circuit is coupled to the comparison circuit and is configured to detect a change in the output of the comparison circuit. A time-to-digital converter (TDC) is coupled to the comparison circuit. A timer is coupled to the comparison circuit. A rate control circuit is coupled to the conversion circuit. An output circuit is coupled to the rate control circuit and the TDC, where the output circuit is configured to output at least one of a synchronous digital representation of the analog signal and an asynchronous digital representation of the analog signal.