Asynchronous Circuit Replication for Single-Event Fault Tolerance
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Solution Overview
Problem
Asynchronous electronic circuits are vulnerable to transient faults caused by radiation effects, such as single-event upsets (SEUs), which can lead to functionality issues like deadlocks and incorrect data computation, and existing fault-tolerant solutions are primarily designed for synchronous circuits and not applicable to asynchronous circuits.
Innovation Solution
The development of a fault-tolerant asynchronous circuit design that replicates logic circuits and uses staticizer circuits with C-elements to ensure immunity to single-event effects (SEEs), employing series transistors and cross-coupled C-elements to prevent error propagation and maintain correct signal values.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If asynchronous circuits are used without clock signals, then circuit speed and flexibility are improved, but vulnerability to transient faults and radiation effects increases
Solution Approach 1:
The patent implements fault tolerance by creating duplicate copies of logic circuits and using replica circuits to generate redundant signals. When a transient fault occurs, the correct replica provides the accurate signal value, allowing the system to tolerate errors without requiring clock signals for error filtering.
Solution Approach 2:
The patent employs feedback mechanisms through C-elements and staticizer circuits that continuously monitor signal values and provide corrective feedback. The C-elements compare signals from multiple replicas and feedback loops ensure that transient errors are corrected by returning to the correct signal state, enabling fault tolerance in asynchronous operation.
2Reliability
If replica circuits are added for fault tolerance, then reliability against SEEs is improved, but device complexity increases
Solution Approach 1:
The patent divides the fault tolerance function into separate modular components: replica logic circuits, C-elements for signal comparison, and staticizer circuits for state stabilization. This segmentation allows each component to perform a specific function and be independently optimized, managing overall complexity while achieving reliable SEE immunity.
Solution Approach 2:
The C-elements and staticizer circuits serve multiple functions: they compare signals from replica circuits, detect transient faults, provide feedback for error correction, and stabilize circuit states. This multi-functionality reduces the need for separate dedicated components for each fault tolerance task, thereby managing device complexity.
Data Source
AI summary
New and improved methods and circuit designs for asynchronous circuits that are tolerant to transient faults, for example of the type introduced through radiation or, more broadly, single-event effects. SEE-tolerant configurations are shown and described for combinational logic circuits, state-holding logic circuits and SRAM memory circuits.